A 1.2-V 165-/spl mu/W 0.29-mm2 Multibit Sigma-Delta ADC for Hearing Aids Using Nonlinear DACs and With Over 91 dB Dynamic-Range
This paper describes the design and experimental evaluation of a multibit Sigma-Delta (ΣΔ)
modulator (ΣΔ\rmM) with enhanced dynamic range (DR) through the use of nonlinear digital …
modulator (ΣΔ\rmM) with enhanced dynamic range (DR) through the use of nonlinear digital …
An 8-bit 120-MS/s interleaved CMOS pipeline ADC based on MOS parametric amplification
This brief presents an 8-bit 120-MS/s time-interleaved pipeline analog-to-digital converter
(ADC) fully based on MOS discrete-time parametric amplification. The ADC, fabricated in a …
(ADC) fully based on MOS discrete-time parametric amplification. The ADC, fabricated in a …
[PDF][PDF] A high speed-low power comparator with composite cascode pre-amplification for oversampled ADCs
CMOS comparator using composite cascode differential pair as a pre-amplification stage.
The purpose of this work is to design a comparator for oversampled ADC application. This …
The purpose of this work is to design a comparator for oversampled ADC application. This …
[LIBRO][B] Reference-Free CMOS Pipeline Analog-to-Digital Converters
M Figueiredo, J Goes, G Evans - 2012 - books.google.com
This book shows that digitally assisted analog to digital converters are not the only way to
cope with poor analog performance caused by technology scaling. It describes various …
cope with poor analog performance caused by technology scaling. It describes various …
Amplifier, amplifying method, and filter
S Iida, A Yoshizawa - US Patent 7,990,210, 2011 - Google Patents
(Continued) Primary Examiner—Patricia Nguyen (74) Attorney, Agent, or Firm—Finnegan,
Henderson, Farabow, Garrett & Dunner, LLP (57) ABSTRACT An amplifier is provided which …
Henderson, Farabow, Garrett & Dunner, LLP (57) ABSTRACT An amplifier is provided which …
Low voltage low power fully differential self‐biased 1.5‐bit quantizer with built‐in thresholds
SUMMARY A new fully differential self‐biased 1.5‐bit flash quantizer with built‐in threshold
voltages, suitable for high speed ADCs and low voltage operation, is described. The …
voltages, suitable for high speed ADCs and low voltage operation, is described. The …
Adaptive hysteretic comparator with opamp threshold level setting
N Ekekwe, R Etienne-Cummings - 2008 51st Midwest …, 2008 - ieeexplore.ieee.org
This paper presents the design of an adaptive hysteretic comparator optimized for noisy
environment. It features an input rail-to-rail opamp which uses feedback networks to set …
environment. It features an input rail-to-rail opamp which uses feedback networks to set …
Analysis and the design of a first-order ΔΣ modulator using very incomplete settling
One of the main building blocks of a Delta-Sigma modulator (ΔΣM) is the integrator circuit.
Usually this is implemented either in discrete or in continuous time domains using amplifiers …
Usually this is implemented either in discrete or in continuous time domains using amplifiers …
Novel techniques for the design and practical realization of switched-capacitor circuits in deep-submicron cmos technologies
AJG Baptista - 2009 - search.proquest.com
Switches presenting high linearity are more and more required in switched-capacitor
circuits, namely in 12 to 16 bits resolution analog-to-digital converters. The CMOS …
circuits, namely in 12 to 16 bits resolution analog-to-digital converters. The CMOS …
Switched capacitor circuit, switched capacitor filter, and sigma-delta A/D converter
S Iida, A Yoshizawa - US Patent 7,834,797, 2010 - Google Patents
(57) ABSTRACT A Switched capacitor circuit includes a capacitor that per forms sampling, a
first switch that is provided between the (56) References Cited capacitor and an input …
first switch that is provided between the (56) References Cited capacitor and an input …