Energy efficient scheduling of real-time tasks on multicore processors
Multicore processors deliver a higher throughput at lower power consumption than unicore
processors. In the near future, they will thus be widely used in mobile real-time systems …
processors. In the near future, they will thus be widely used in mobile real-time systems …
An approximation algorithm for energy-efficient scheduling on a chip multiprocessor
In the recent decade, voltage scaling has become an attractive feature for many system
component designs. In this paper we consider energy-efficient real-time task scheduling …
component designs. In this paper we consider energy-efficient real-time task scheduling …
Energy-efficient scheduling of periodic real-time tasks on lightly loaded multicore processors
WY Lee - IEEE Transactions on Parallel and Distributed …, 2011 - ieeexplore.ieee.org
For lightly loaded multicore processors that contain more processing cores than running
tasks and have dynamic voltage and frequency scaling capability, we address the energy …
tasks and have dynamic voltage and frequency scaling capability, we address the energy …
MUTE-AES: A multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm
Side channel attack based upon the analysis of power traces is an effective way of obtaining
the encryption key from secure processors. Power traces can be used to detect bitflips which …
the encryption key from secure processors. Power traces can be used to detect bitflips which …
Multiprocessor information concealment architecture to prevent power analysis-based side channel attacks
Side channel attackers observe external manifestations of internal computations in an
embedded system to predict the encryption key employed. The ability to examine such …
embedded system to predict the encryption key employed. The ability to examine such …
Energy-efficient scheduling of a real-time task on DVFS-enabled multi-cores
We propose an energy-efficient scheduling of a long-lived real-time video task running on
DVFS-enabled multi-core platforms. The proposed scheme reduces the energy consumption …
DVFS-enabled multi-core platforms. The proposed scheme reduces the energy consumption …
Leakage-aware reallocation for periodic real-time tasks on multicore processors
H Huang, F **a, J Wang, S Lei… - 2010 Fifth International …, 2010 - ieeexplore.ieee.org
It is an increasingly important issue to reduce the energy consumption of computing
systems. In this paper, we consider partition based energy-aware scheduling of periodic real …
systems. In this paper, we consider partition based energy-aware scheduling of periodic real …
A new end-to-end measurement method for estimating available bandwidth
L Min, S **glin, L Zhongcheng… - Proceedings of the …, 2003 - ieeexplore.ieee.org
We present an original end-to-end available bandwidth measurement method, called
SMART (statistics measurement for avail-bw by random train). It resolves some of the …
SMART (statistics measurement for avail-bw by random train). It resolves some of the …
Design of adaptive multiprocessor on chip systems
C Bobda, T Haller, F Muehlbauer, D Rech… - Proceedings of the 20th …, 2007 - dl.acm.org
We present a design approach for adaptive multiprocessors on chip, in particular for FPGA
devices. The approach consists of two steps in which the hardware infrastructure is first …
devices. The approach consists of two steps in which the hardware infrastructure is first …
Speeding up the memory hierarchy in flat COMA multiprocessors
L Yang, J Torrellas - Proceedings Third International …, 1997 - ieeexplore.ieee.org
Scalable Flat Cache Only Memory Architectures (Flat COMA) are designed for reduced
memory access latencies while minimizing programmer and operating system involvement …
memory access latencies while minimizing programmer and operating system involvement …