ViP: A hierarchical parallel vision processor for hybrid vision chip
X Zheng, L Cheng, M Zhao, Q Luo, H Li… - … on Circuits and …, 2022 - ieeexplore.ieee.org
Nowadays, the vision chip bridging sensing and processing has been extensively employed
in high-speed image processing, owing to its excellent performance, low power …
in high-speed image processing, owing to its excellent performance, low power …
RMSRM: real-time monitoring-based self-reconfiguration mechanism in reconfigurable PE array
K Yang, L Jiang, R Shan, K Li, X Cui - The Journal of Supercomputing, 2024 - Springer
Modern applications need to flexibly adjust the processing process according to the different
environments and real-time processing, thus putting forward higher requirements for the …
environments and real-time processing, thus putting forward higher requirements for the …
Exploring Dynamic Partial Reconfiguration in a Tightly-coupled Coprocessor Attached to a RISC-V Soft-processor on a FPGA
JWA Castro… - 2021 IEEE XXVIII …, 2021 - ieeexplore.ieee.org
Dynamic reconfigurable processors take advantage of the flexibility of general-purpose
processors architectures to execute instruction programs, and the flexibility of reconfigurable …
processors architectures to execute instruction programs, and the flexibility of reconfigurable …
Automatic Compilation of CNN on Reconfigurable Array Processor Based on Scalable Instruction Group Library
Y Li, N Wang, M Sheng, J Shi - IEEE Access, 2023 - ieeexplore.ieee.org
Although reconfigurable architecture is an inevitable choice for dealing with high-intensive
applications, the opacity of hardware structure programming and the fuzziness or …
applications, the opacity of hardware structure programming and the fuzziness or …
DMPRA: A Dynamic Reconfiguration Mechanism for a Dual-Mode Programmable Reconfigurable Array Architecture
K Li, L Jiang, X Huang, K Yang, X **e… - Journal of Circuits …, 2023 - World Scientific
To improve the performance and power efficiency of various algorithms in specific
applications, reconfigurable architecture has become an effective choice in academia and …
applications, reconfigurable architecture has become an effective choice in academia and …
A dynamic general accelerator for integer and fixed-point processing
AAD Farahani, H Beitollahi… - IEEE Transactions on Very …, 2020 - ieeexplore.ieee.org
Coarse-grained reconfigurable arrays (CGRAs) are used as low-power and high-
performance accelerators in the processors of the Internet of Things (IoT) and embedded …
performance accelerators in the processors of the Internet of Things (IoT) and embedded …
Dynamic Multi-bit Parallel Computing Method Based on Reconfigurable Structure
L Jiang, S Liu, J Zhu, R Shan, Y Li - International Conference on …, 2023 - Springer
Reconfigurable architecture has great potential in computation-intensive and memory-
intensive applications due to its flexible information configuration. Aiming at the problem of …
intensive applications due to its flexible information configuration. Aiming at the problem of …
The Research of Reconfigurable Array Processor for Massive MIMO Detection Algorithm
Y Liu, S Han, H Cai, Y Wang - 2022 14th International …, 2022 - ieeexplore.ieee.org
Aiming at the shortcomings of traditional MIMO detection chips, such as low processing
speed, low data throughput, high delay, a reconfigurable array processor is designed for …
speed, low data throughput, high delay, a reconfigurable array processor is designed for …