MLCAD: A survey of research in machine learning for CAD keynote paper
Due to the increasing size of integrated circuits (ICs), their design and optimization phases
(ie, computer-aided design, CAD) grow increasingly complex. At design time, a large design …
(ie, computer-aided design, CAD) grow increasingly complex. At design time, a large design …
Hardware security for and beyond CMOS technology: an overview on fundamentals, applications, and challenges
J Knechtel - Proceedings of the 2020 International Symposium on …, 2020 - dl.acm.org
As with most aspects of electronic systems and integrated circuits, hardware security has
traditionally evolved around the dominant CMOS technology. However, with the rise of …
traditionally evolved around the dominant CMOS technology. However, with the rise of …
Dr. CU 2.0: A scalable detailed routing framework with correct-by-construction design rule satisfaction
Detailed routing becomes a crucial challenge in VLSI design with shrinking feature size and
increasing design complexity. More complicated design rules were added to guarantee …
increasing design complexity. More complicated design rules were added to guarantee …
Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging
Layout camouflaging can protect the intellectual property of modern circuits. Most prior art,
however, incurs excessive layout overheads and necessitates customization of active …
however, incurs excessive layout overheads and necessitates customization of active …
Gamora: Graph learning based symbolic reasoning for large-scale boolean networks
Reasoning high-level abstractions from bit-blasted Boolean networks (BNs) such as gate-
level netlists can significantly benefit functional verification, logic minimization, datapath …
level netlists can significantly benefit functional verification, logic minimization, datapath …
Towards secure composition of integrated circuits and electronic systems: On the role of EDA
Modern electronic systems become evermore complex, yet remain modular, with integrated
circuits (ICs) acting as versatile hardware components at their heart. Electronic design …
circuits (ICs) acting as versatile hardware components at their heart. Electronic design …
Graph learning-based arithmetic block identification
Arithmetic block identification in gate-level netlist is an essential procedure for malicious
logic detection, functional verification, or macro-block optimization. We argue that existing …
logic detection, functional verification, or macro-block optimization. We argue that existing …
Protect your chip design intellectual property: An overview
The increasing cost of integrated circuit (IC) fabrication has driven most companies to" go
fabless" over time. The corresponding outsourcing trend gave rise to various attack vectors …
fabless" over time. The corresponding outsourcing trend gave rise to various attack vectors …
Concerted wire lifting: Enabling secure and cost-effective split manufacturing
In this work, we advance the security promise of split manufacturing through judicious
handling of interconnects. First, we study the cost-security tradeoffs underlying for split …
handling of interconnects. First, we study the cost-security tradeoffs underlying for split …
Hardware security for and beyond CMOS technology
J Knechtel - Proceedings of the 2021 International Symposium on …, 2021 - dl.acm.org
As with most aspects of electronic systems and integrated circuits, hardware security has
traditionally evolved around the dominant CMOS technology. However, with the rise of …
traditionally evolved around the dominant CMOS technology. However, with the rise of …