Optimizing Network-on-Chip using metaheuristic algorithms: A comprehensive survey
Abstract Network on Chip (NoC) is an interesting technology that benefits from several
processing elements and the necessary communication facilities, to provide an answer to …
processing elements and the necessary communication facilities, to provide an answer to …
Continuous metaheuristics for binary optimization problems: An updated systematic literature review
For years, extensive research has been in the binarization of continuous metaheuristics for
solving binary-domain combinatorial problems. This paper is a continuation of a previous …
solving binary-domain combinatorial problems. This paper is a continuation of a previous …
Performance evaluation of application map** approaches for network-on-chip designs
Network-on-chip (NoC) is evolving as a better substitute for incorporating a large number of
cores on a single system-on-chip (SoC). The dependency on multi-core systems to …
cores on a single system-on-chip (SoC). The dependency on multi-core systems to …
iHPSA: An improved bio-inspired hybrid optimization algorithm for task map** in Network on Chip
Abstract System on a chip (SoC) is the leading technology in the recent global world of
digitization. The classical bus-based regular communication infrastructures of SoCs cannot …
digitization. The classical bus-based regular communication infrastructures of SoCs cannot …
Efficient application map** approach based on grey wolf optimization for network on chip
In modern chip designs with multiple processors, network-on-chip (NoC) has emerged as a
critical solution, offering scalability, flexibility, modularity, and efficiency. However, a …
critical solution, offering scalability, flexibility, modularity, and efficiency. However, a …
Evaluating the effectiveness of bat optimization in an adaptive and energy-efficient network-on-chip routing framework
Adaptive routing is effective in maintaining higher processor performance and avoids
packets over minimal or non-minimal alternate routes without congestion for a …
packets over minimal or non-minimal alternate routes without congestion for a …
Performance evaluation of modified mesh-based NoC architecture
BNK Reddy, S Kar - Computers and Electrical Engineering, 2022 - Elsevier
With the advancement of technology in the field of VLSI, it is possible to integrate several
computing elements onto a single chip. The performance of these single bus-based models …
computing elements onto a single chip. The performance of these single bus-based models …
A hot-module-aware map** approach in network-on-chip
In this research, a hot module location-aware heuristic map** algorithm for placement of
hot modules is proposed, which aims to prevent the negative effects of tasks on the …
hot modules is proposed, which aims to prevent the negative effects of tasks on the …
Energy Efficient and High Performance Modified Mesh based 2-D NoC Architecture
BNK Reddy, S Kar - 2021 IEEE 22nd International Conference …, 2021 - ieeexplore.ieee.org
System-on-chip (SoC) has migrated from single core to multi core architectures to adapt the
expanding intricacy of real time applications. Network-on-chip (NoC) is appeared as an …
expanding intricacy of real time applications. Network-on-chip (NoC) is appeared as an …
Camera Network Topology Map** Based on the Integration of Network Information and Physical Distribution Under the Background of Communication Security
M Chen - Journal of Cyber Security and Mobility, 2023 - journals.riverpublishers.com
At present, most cameras use internal networks and use methods such as Traceroute for
security protection, which cannot meet the requirements of camera network map** …
security protection, which cannot meet the requirements of camera network map** …