Logic BIST with capture-per-clock hybrid test points

E Moghaddam, N Mukherjee, J Rajski… - … on Computer-Aided …, 2018 - ieeexplore.ieee.org
Logic built-in self-test (LBIST) is now increasingly used with on-chip test compression as a
complementary solution for in-system test, where high quality, low power, low silicon area …

Board-level functional fault identification using streaming data

M Liu, F Ye, X Li, K Chakrabarty… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
High integration densities and design complexity of printed-circuit boards make board-level
functional fault identification extremely difficult. Machine learning provides an opportunity to …

Test point insertion for multi-cycle power-on self-test

S Wang, X Zhou, Y Higami, H Takahashi… - ACM Transactions on …, 2023 - dl.acm.org
Under the functional safety standard ISO26262, automotive systems require testing in the
field, such as the power-on self-test (POST). Unlike the production test, the POST requires …

Knowledge transfer in board-level functional fault diagnosis enabled by domain adaptation

M Liu, X Li, K Chakrabarty, X Gu - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
High integration densities and design complexity make board-level functional fault diagnosis
extremely difficult. Machine-learning techniques can identify functional faults with high …

Test time and area optimized BrST scheme for automotive ICs

N Mukherjee, D Tille, M Sapati, Y Liu… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
As cars become increasingly computerized and their safety functions are evolving rapidly,
the number of complex safety-critical components deployed in advanced driver assistance …

Functional Compaction for Functional Test Sequences

I Pomeranz - IEEE Access, 2024 - ieeexplore.ieee.org
The occurrence of silent data corruption because of hardware defects in large scale data
centers points to the advantages of applying functional test sequences to detect hardware …

Time and area optimized testing of automotive ICs

N Mukherjee, D Tille, M Sapati, Y Liu… - … Transactions on Very …, 2020 - ieeexplore.ieee.org
As cars become increasingly computerized and their safety functions evolve rapidly, the
number of complex safety-critical components deployed in advanced driver assistance …

Developments in scan shift power reduction: a survey

V Sontakke, J Dickhoff - Bulletin of Electrical Engineering and Informatics, 2023 - beei.org
While power reduction during testing is necessary for today's low-power devices, it also
lowers test costs. Scan-based methods are the most widely used approach for testing …

Staggered ATPG with capture-per-cycle observation test points

Y Liu, J Rajski, SM Reddy, J Solecki… - 2018 IEEE 36th VLSI …, 2018 - ieeexplore.ieee.org
This paper presents a new staggered test pattern generation scheme. It produces
deterministic stimuli in the course of a test-per-clock-based process by using dedicated …

Full-scan LBIST with capture-per-cycle hybrid test points

S Milewski, N Mukherjee, J Rajski… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
This paper presents a novel low-area scan-based logic built-in self-test (LBIST) scheme that
addresses stringent test requirements of certain application domains such as the fast …