Configurable IC with interconnect circuits that also perform storage operations

S Teig, H Schmit, J Redgrave, V Chandra - US Patent 7,342,415, 2008 - Google Patents
Some embodiments provide a configurable IC that includes several configurable logic
circuits for configurably performing computations. The configurable IC also includes several …

A 90nm low-power FPGA for battery-powered applications

T Tuan, S Kao, A Rahman, S Das… - Proceedings of the 2006 …, 2006 - dl.acm.org
Programmable logic devices such as FPGAs are useful for a wide range of applications.
However, FPGAs are not commonly used in battery-powered applications because they …

FPGA design automation: A survey

D Chen, J Cong, P Pan - Foundations and Trends® in …, 2006 - nowpublishers.com
Abstract Design automation or computer-aided design (CAD) for field programmable gate
arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA …

Active leakage power optimization for FPGAs

JH Anderson, FN Najm, T Tuan - Proceedings of the 2004 ACM/SIGDA …, 2004 - dl.acm.org
We consider active leakage power dissipation in FPGAs and present a" no cost" approach
for active leakage reduction. It is well-known that the leakage power consumed by a digital …

[PDF][PDF] Reduction of power consumption in FPGAs-an overview

N Grover, MK Soni - International journal of information engineering …, 2012 - mecs-press.org
Field Programmable Gate Arrays FPGAs are highly desirable for implementation of digital
systems due to their flexibility, programmability and low end product life cycle. In more than …

Power modeling and characteristics of field programmable gate arrays

F Li, Y Lin, L He, D Chen, J Cong - IEEE Transactions on …, 2005 - ieeexplore.ieee.org
This paper studies power modeling for field programmable gate arrays (FPGAs) and
investigates FPGA power characteristics in nanometer technologies. Considering both …

Finite state machine synthesis with concurrent error detection

C Zeng, N Saxena… - … Test Conference 1999 …, 1999 - ieeexplore.ieee.org
A new synthesis technique for designing finite state machines with on-line parity checking is
presented. The output logic and the next-state logic of the finite state machines are checked …

Development of field programmable modular wireless sensor network nodes for ambient systems

SJ Bellis, K Delaney, B O'Flynn, J Barton… - Computer …, 2005 - Elsevier
The goal of this work is to fabricate robust, miniature, wireless sensor modules. These
provide an enabling technology platform to conduct research in creating ambient systems …

A Dual-V DD Low Power FPGA Architecture

A Gayasen, K Lee, N Vijaykrishnan… - … Logic and Application …, 2004 - Springer
The continuing increase in FPGA size and complexity and the emergence of sub-100nm
technology have made FPGA power consumption, both dynamic and static, an important …

FPGA power reduction using configurable dual-Vdd

F Li, Y Lin, L He - Proceedings of the 41st annual design automation …, 2004 - dl.acm.org
Power optimization is of growing importance for FPGAs in nanometer technologies.
Considering dual-Vdd technique, we show that configurable power supply is required to …