The RISC-V open Instruction Set Architecture (ISA) has proven to be a solid alternative to
licensed ISAs. In the past 5 years, a plethora of industrial and academic cores and …

The use of large-scale supercomputing architectures is a hard requirement for scientific
computing Big-Data applications. An example is genomics analytics, where millions of data …

Linear algebra computational kernels based on byte and sub-byte integer data formats are
at the base of many classes of applications, ranging from Deep Learning to Pattern …

This paper describes the design, verification, implementation and fabrication of the Drac
Vector IN-Order (DVINO) processor, a RISC-V vector processor capable of booting Linux …

Since the last few years, open-source hardware is preferred in the landscape of hardware
development. Originally proprietary hardware was only developed by big multinational …

The RISC-V ISA has gained significant momentum in High-Performance Computing (HPC)
research and market due to its open-source nature, fostering collaborative research and …

The analysis of existing platforms and tools for designing systems on chip is given. The
variants of soft-processor architectures that are relevant at the current moment are …

This article presents the first known physical implementation of a RISC-V core based on the
FemtoRV32 project, using the Quark core to implement the RV32I instruction set. Our …

Debugging of modern embedded systems can be very challenging due to the close
cooperation of many independent components they consist of. The necessity to maintain …

In recent years, demand for data-parallel processing has been growing, and this parallelism
often appears in AI processes. One method to accelerate these processes is using DSA …