A survey of on-chip optical interconnects
Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …
networks to large manycore processors. Some of these challenges include high latency …
BigBus: A scalable optical interconnect
This article presents BigBus, a novel design of an on-chip photonic network for a 1,024-node
system. For such a large on-chip network, performance and power reduction are two …
system. For such a large on-chip network, performance and power reduction are two …
ColdBus: A near-optimal power efficient optical bus
High static power dissipation is one of the largest hurdles in the widespread adoption of on-
chip optical networks. There are numerous proposals in literature for the reduction of static …
chip optical networks. There are numerous proposals in literature for the reduction of static …
Optical overlay nuca: A high-speed substrate for shared l2 caches
In this article, we propose using optical networks-on-chip (NoCs) to design cache access
protocols for large shared L2 caches. We observe that the problem is unique because …
protocols for large shared L2 caches. We observe that the problem is unique because …
Optical overlay NUCA: A high speed substrate for shared L2 caches
E Peter, A Arora, A Bagaria… - 2014 21st International …, 2014 - ieeexplore.ieee.org
In this paper, we propose to use optical NOCs to design cache access protocols for large
shared L2 caches. We observe that the problem is unique because optical networks have …
shared L2 caches. We observe that the problem is unique because optical networks have …