Advances in logic locking: Past, present, and prospects

HM Kamali, KZ Azar, F Farahmandi… - Cryptology ePrint …, 2022 - eprint.iacr.org
Logic locking is a design concealment mechanism for protecting the IPs integrated into
modern System-on-Chip (SoC) architectures from a wide range of hardware security threats …

Defense-in-depth: A recipe for logic locking to prevail

MT Rahman, MS Rahman, H Wang, S Tajik, W Khalil… - Integration, 2020 - Elsevier
Logic locking/obfuscation has emerged as an auspicious solution for protecting the
semiconductor intellectual property (IP) from the untrusted entities in the design and …

CAS-Lock: A security-corruptibility trade-off resilient logic locking scheme

B Shakya, X Xu, M Tehranipoor, D Forte - IACR Transactions on …, 2020 - tches.iacr.org
Logic locking has recently been proposed as a solution for protecting gatelevel
semiconductor intellectual property (IP). However, numerous attacks have been mounted on …

IP protection and supply chain security through logic obfuscation: A systematic overview

K Shamsi, M Li, K Plaks, S Fazzari, DZ Pan… - ACM Transactions on …, 2019 - dl.acm.org
The globalization of the semiconductor supply chain introduces ever-increasing security and
privacy risks. Two major concerns are IP theft through reverse engineering and malicious …

A survey of algorithmic methods in IC reverse engineering

L Azriel, J Speith, N Albartus, R Ginosar… - Journal of Cryptographic …, 2021 - Springer
The discipline of reverse engineering integrated circuits (ICs) is as old as the technology
itself. It grew out of the need to analyze competitor's products and detect possible IP …

Automatic Extraction of Secrets from the Transistor Jungle using {Laser-Assisted}{Side-Channel} Attacks

T Krachenfels, T Kiyan, S Tajik, JP Seifert - 30th USENIX security …, 2021 - usenix.org
The security of modern electronic devices relies on secret keys stored on secure hardware
modules as the root-of-trust (RoT). Extracting those keys would break the security of the …

Satisfiability attack-resistant camouflaged two-dimensional heterostructure devices

A Wali, S Kundu, AJ Arnold, G Zhao, K Basu, S Das - ACS nano, 2021 - ACS Publications
Reverse engineering (RE) is one of the major security threats to the semiconductor industry
due to the involvement of untrustworthy parties in an increasingly globalized chip …

[HTML][HTML] A survey on security analysis of machine learning-oriented hardware and software intellectual property

A Tauhid, L Xu, M Rahman, E Tomai - High-Confidence Computing, 2023 - Elsevier
Intellectual Property (IP) includes ideas, innovations, methodologies, works of authorship
(viz., literary and artistic works), emblems, brands, images, etc. This property is intangible …

Dfssd: Deep faults and shallow state duality, a provably strong obfuscation solution for circuits with restricted access to scan chain

S Roshanisefat, HM Kamali, KZ Azar… - 2020 IEEE 38th VLSI …, 2020 - ieeexplore.ieee.org
In this paper, we introduce DFSSD, a novel logic locking solution for sequential and FSM
circuits with a restricted (locked) access to the scan chain. DFSSD combines two techniques …

AdaTest: Reinforcement learning and adaptive sampling for on-chip hardware Trojan detection

H Chen, X Zhang, K Huang, F Koushanfar - ACM Transactions on …, 2023 - dl.acm.org
This paper proposes AdaTest, a novel adaptive test pattern generation framework for
efficient and reliable Hardware Trojan (HT) detection. HT is a backdoor attack that tampers …