Switch-Less Dragonfly on Wafers: A Scalable Interconnection Architecture based on Wafer-Scale Integration

Y Feng, K Ma - SC24: International Conference for High …, 2024 - ieeexplore.ieee.org
Existing high-performance computing (HPC) interconnection architectures are based on
high-radix switches, which limits the injection/local performance and introduces …

WaferLLM: A Wafer-Scale LLM Inference System

C He, Y Huang, P Mu, Z Miao, J Xue, L Ma… - arxiv preprint arxiv …, 2025 - arxiv.org
Emerging AI accelerators increasingly adopt wafer-scale manufacturing technologies,
integrating hundreds of thousands of AI cores in a mesh-based architecture with large …

2D Collective Communication for the Cerebras Wafer-Scale Engine

L Schnyder - 2024 - research-collection.ethz.ch
The Cerebras Wafer-Scale Engine (WSE) is a powerful architecture, initially introduced for
machine learning, but also a viable tool for a larger variety of high-performance …