[HTML][HTML] Adaptive single-layer aggregation framework for energy-efficient and privacy-preserving load forecasting in heterogeneous Federated smart grids
Federated Learning (FL) enhances predictive accuracy in load forecasting by integrating
data from distributed load networks while ensuring data privacy. However, the …
data from distributed load networks while ensuring data privacy. However, the …
[HTML][HTML] Design-time methodology for optimizing mixed-precision CPU architectures on FPGA
Approximate computing can significantly reduce the energy consumption of computing
systems. Mixed-precision hardware architectures and precision-tuning tools for software …
systems. Mixed-precision hardware architectures and precision-tuning tools for software …
Fpga implementation of image registration using accelerated cnn
SG Aydin, HŞ Bilge - Sensors, 2023 - mdpi.com
Background: Accurate and fast image registration (IR) is critical during surgical interventions
where the ultrasound (US) modality is used for image-guided intervention. Convolutional …
where the ultrasound (US) modality is used for image-guided intervention. Convolutional …
[PDF][PDF] Lightweight single-layer aggregation framework for energy-efficient and privacy-preserving load forecasting in heterogeneous smart grids
Federated Learning (FL) in load forecasting improves predictive accuracy by leveraging
data from distributed load networks while preserving data privacy. However, the …
data from distributed load networks while preserving data privacy. However, the …
Hardware and software support for mixed precision computing: a roadmap for embedded and hpc systems
Mixed precision is an approximate computing technique that can be used to trade-off
computation accuracy for performance and/or energy. It can be applied to many error …
computation accuracy for performance and/or energy. It can be applied to many error …
A Deep Learning-Assisted Template Attack Against Dynamic Frequency Scaling Countermeasures
In the last decades, machine learning techniques have been extensively used in place of
classical template attacks to implement profiled side-channel analysis. This manuscript …
classical template attacks to implement profiled side-channel analysis. This manuscript …
Optimization of the fixed-point representation of measurement data for intelligent measurement systems
The development of intelligent measurement systems by implementing AI (artificial
intelligence) algorithms on edge sensor nodes is very topical. Due to very limited hardware …
intelligence) algorithms on edge sensor nodes is very topical. Due to very limited hardware …
Design of a novel low-latency parameterizable posit adder/subtractor using leading one predictor in FPGA
Posit arithmetic has attracted a lot of attention as a promising alternative to the IEEE754
floating-point number representation thanks to its advantages such as higher accuracy and …
floating-point number representation thanks to its advantages such as higher accuracy and …
An FPGA-Based Open-Source Hardware-Software Framework for Side-Channel Security Research
Attacks based on side-channel analysis (SCA) pose a severe security threat to modern
computing platforms, further exacerbated on IoT devices by their pervasiveness and …
computing platforms, further exacerbated on IoT devices by their pervasiveness and …
Optimization of the 24-Bit Fixed-Point Format for the Laplacian Source
ZH Perić, MR Dinčić - Mathematics, 2023 - mdpi.com
The 32-bit floating-point (FP32) binary format, commonly used for data representation in
computers, introduces high complexity, requiring powerful and expensive hardware for data …
computers, introduces high complexity, requiring powerful and expensive hardware for data …