Abstract NoCs (Network on Chips) are the most popular interconnection mechanism used
for systems that require flexibility, extensibility and low power consumption. However …

Abstract Networks− on− chip (NoC) are an alternative to alleviate the problems of legacy
interconnect fabrics. However, many emerging technology NoC are developed and are now …

Increasing fault rates in current and future technology nodes coupled with on-chip
components in the hundreds calls for robust and fault-tolerant Network-on-Chip (NoC) …

Newest processes of CMOS manufacturing allow integrating billions of transistors in a single
chip. This huge integration enables to perform complex circuits, which require an energy …

Aggressive communication among cores in multi-core architectures leads to excessive
workload on the components which often degrades the normal functionality and induces …

Routing algorithm design for on-chip networks (OCNs) has become increasingly challenging
due to high levels of integration and complexity of modern systems-on-chip (SoCs). The …

Since several decades, fault tolerance has become a major research field due to transistor
shrinking and core number increasing in system-on-chip (SoC). Especially, faults occurring …

In this paper, we present a fully adaptive routing algorithm for 3D stacked mesh, called 3D-
FAR. This algorithm utilizes two, two, and four virtual channels along the X, Y, and Z …

Faults at either the link or router level may result in the failure of the system. Fault-tolerant
routing algorithms attempt to tolerate faults by rerouting packets around the faulty region …

In today's world, the demands for high-performance computing necessitate faster on-chip
communication. Current chips with a large number of on-chip elements need an efficient …