A power and area optimization approach of mixed polarity Reed-Muller expression for incompletely specified Boolean functions
ZX He, LM **
D Chen, Y ** Based on Gate Node Interval Selection in CMOL Circuits
J Wang, Y ** in defect existed CMOL circuits, this paper
proposes a defect-tolerant map** method based on gate node interval selection. The logic …
proposes a defect-tolerant map** method based on gate node interval selection. The logic …
Fine-grained defect diagnosis for CMOL FPGA circuits
J Kim, H Lee, S Jang, S Kang - IEEE Access, 2020 - ieeexplore.ieee.org
Nanotechnology is an important technological alternative to overcome the limitations of
complementary metal-oxide-semiconductor (CMOS) technology. Various circuit …
complementary metal-oxide-semiconductor (CMOS) technology. Various circuit …
Ant-colony-optimization based heuristic searching algorithm for cell assignment in a hybrid cmos/nano circuits (cmol) array
C Xu, K Nepal - 14th IEEE International Conference on …, 2014 - ieeexplore.ieee.org
In this paper, we focus on the placement of cells in a CMOL array given a specific
connectivity domain using the Ant Colony Optimization algorithm. We describe the algorithm …
connectivity domain using the Ant Colony Optimization algorithm. We describe the algorithm …
Interference in geoelectric field observation from the current of a direct-current grounding electrode
B Tang, Z Wu, R Liu, S Wang… - Turkish Journal of …, 2016 - journals.tubitak.gov.tr
The existence of ultrahigh voltage direct-current (UHVDC) transmission lines impacts
geoelectric field observation (GFO), which further disturbs earthquake observation and …
geoelectric field observation (GFO), which further disturbs earthquake observation and …