This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …

Test data compression consists of test vector compression on the input side and response,
compaction on the output side. This vector compression has been an active area of …

Advances in semiconductor process and design technology enable the design of complex
system chips. Traditional IC design in which every circuit is designed from scratch and reuse …

This paper presents an overview of an intelligence platform we have built to address threat
hunting and incident investigation use-cases in the cyber security domain. Specifically, we …

The unprecedented urbanization and the staggering development of modern information
and communication technologies (ICT) demonstrate that the concept of Smart City is …

The entropy of a set of data is a measure of the amount of information contained in it.
Entropy calculations for fully specified data have been used to get a theoretical bound on …

With the development of system-on-chip (SoC) and chiplet technology in the post-Moore era,
an increasing number of chiplets are being integrated into a single chip. Consequently, the …

Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test
data volume. Larger test data size demands not only higher memory requirements, but also …

We present a selective encoding method that reduces test data volume and test application
time for scan testing of intellectual property (IP) cores. This method encodes the slices of test …

The embedded deterministic test-based compression uses cube merging to reduce a pattern
count, the amount of test data, and test time. It gradually expands a test pattern by …