A high-performance energy-efficient architecture for FIR adaptive filter based on new distributed arithmetic formulation of block LMS algorithm

BK Mohanty, PK Meher - IEEE transactions on signal …, 2012 - ieeexplore.ieee.org
In this paper, we present an efficient distributed-arithmetic (DA) formulation for the
implementation of block least mean square (BLMS) algorithm. The proposed DA-based …

A systolic architecture for LMS adaptive filtering with minimal adaptation delay

S Ramanathan, V Visvanathan - Proceedings of 9th …, 1996 - ieeexplore.ieee.org
Existing systolic architectures for the LMS algorithm with delayed coefficient adaptation have
large adaptation delay and hence degraded convergence behaviour. This paper presents a …

Delayed block LMS algorithm and concurrent architecture for high-speed implementation of adaptive FIR filters

BK Mohanty, PK Meher - TENCON 2008-2008 IEEE Region 10 …, 2008 - ieeexplore.ieee.org
In this paper, we propose a block least mean square algorithm with delayed weight
adaptation for hardware implementation of finite impulse response (FIR) adaptive filters. We …

Efficient very large‐scale integration architecture for variable length block least mean square adaptive filter

BK Mohanty, SK Patel - IET Signal Processing, 2015 - Wiley Online Library
The authors made an analysis on computational complexity of block least mean square
(BLMS) finite impulse response (FIR) filter and decompose the filter computation into M sub …

Low-power pipelined LMS adaptive filter architectures with minimal adaptation delay

S Ramanathan, V Visvanathan - Integration, 1999 - Elsevier
The use of delayed coefficient adaptation in the least mean square (LMS) algorithm has
enabled the design of pipelined architectures for real-time transversal adaptive filtering …

[PDF][PDF] Efficient VLSI Architecture for Variable Length Block LMS Adaptive Filter

BK Mohanty, SK Patel - Signal Processing, IET, 2015 - academia.edu
In this paper, we made an analysis on computational complexity of block least mean square
(BLMS) finite impulse response (FIR) filter and decompose the filter computation into M sub …

[PDF][PDF] Power efficient and high throughput of FIR filter using block least mean square algorithm in FPGA

M Devipriya, V Saravanan… - Int. J. Res. Eng. Technol …, 2014 - academia.edu
In silicon on chip technology demands high performance and low power Very Large Scale
Integrated Circuit (VLSI) digital signal processing (DSP) systems. The aim of this paper …

[PDF][PDF] Review on Implementation of Fir Adaptive Filter Using Distributed Arithmatic and Block Lms Algorithm

MRP Deshmukh, SA Koti, VB Baru - academia.edu
Adaptive filters play very important role in signal processing application. There are several
algorithms for implementation of filters such as Least mean square (LMS), Recursive least …

[ЦИТИРОВАНИЕ][C] Digit-Serial Architecture For VLSI Implementation of Delayed LMS FIR Adaptive Filters

MB Kumar - IEEE Signal Processing Lett., 2012