PULP: A ultra-low power parallel accelerator for energy-efficient and flexible embedded vision

F Conti, D Rossi, A Pullini, I Loi, L Benini - Journal of Signal Processing …, 2016 - Springer
Novel pervasive devices such as smart surveillance cameras and autonomous micro-UAVs
could greatly benefit from the availability of a computing device supporting embedded …

Power, area, and performance optimization of standard cell memory arrays through controlled placement

A Teman, D Rossi, P Meinerzhagen, L Benini… - ACM Transactions on …, 2016 - dl.acm.org
Embedded memory remains a major bottleneck in current integrated circuit design in terms
of silicon area, power dissipation, and performance; however, static random access …

A 65 nm 32 b subthreshold processor with 9T multi-Vt SRAM and adaptive supply voltage control

S Lutkemeier, T Jungeblut, HKO Berge… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
An energy-efficient SoC with 32 b subthreshold RISC processor cores, 32 kB conventional
cache memory, and 9T ultra-low voltage (ULV) SRAM based on a flexible and extensible …

A 5 μW Standard Cell Memory-Based Configurable Hyperdimensional Computing Accelerator for Always-on Smart Sensing

M Eggimann, A Rahimi, L Benini - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Hyperdimensional computing (HDC) is a brain-inspired computing paradigm-based on high-
dimensional holistic representations of vectors. It recently gained attention for embedded …

Energy/reliability trade-offs in low-voltage ReRAM-based non-volatile flip-flop design

I Kazi, P Meinerzhagen, PE Gaillardon… - … on Circuits and …, 2014 - ieeexplore.ieee.org
The total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often
dominated by the leakage power of embedded memories as well as status registers. On the …

A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS

J Kim, P Mazumder - Integration, 2017 - Elsevier
Near-threshold operation is garnering growing attention for ultra-low power applications
despite the fact the reliability of the near-threshold digital systems warrants unprecedented …

Single-supply 3T gain-cell for low-voltage low-power applications

R Giterman, A Teman, P Meinerzhagen… - … Transactions on Very …, 2015 - ieeexplore.ieee.org
Logic compatible gain cell (GC)-embedded DRAM (eDRAM) arrays are considered an
alternative to SRAM due to their small size, nonratioed operation, low static leakage, and …

Efficient implementation of many-ported memories by using standard-cell memory approach

H Marinberg, E Garzón, T Noy, M Lanuzza… - IEEE …, 2023 - ieeexplore.ieee.org
Multi-ported memories are widely used in many applications, such as for high-speed and
high-performance parallel computations. While conventional SRAM-based memory macros …

Energy-efficient vision on the PULP platform for ultra-low power parallel computing

F Conti, D Rossi, A Pullini, I Loi… - 2014 IEEE Workshop on …, 2014 - ieeexplore.ieee.org
Many-core architectures structured as fabrics of tightly-coupled clusters have shown
promising results on embedded computer vision benchmarks, providing state-of-art …

TamaRISC-CS: An ultra-low-power application-specific processor for compressed sensing

J Constantin, A Dogan, O Andersson… - 2012 IEEE/IFIP 20th …, 2012 - ieeexplore.ieee.org
Compressed sensing (CS) is a universal technique for the compression of sparse signals.
CS has been widely used in sensing platforms where portable, autonomous devices have to …