Performance optimization of VLSI interconnect layout

J Cong, L He, CK Koh, PH Madden - Integration, 1996 - Elsevier
This paper presents a comprehensive survey of existing techniques for interconnect
optimization during the VLSI physical design process, with emphasis on recent studies on …

[CARTE][B] Algorithms for VLSI physical design automation

NA Sherwani - 2012 - books.google.com
Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for
graduate students and CAD professionals. Based on the very successful First Edition, it …

A state-of-the-art report on computational stochastic mechanics

LA Bergman, M Shinozuka, CG Bucher… - Probabilistic …, 1997 - experts.illinois.edu
This state-of-the-art report assesses the current state of development of computational
procedures as utilized in stochastic mechanics. The theoretical developments and aspects …

[PDF][PDF] DUNE: A multi-layer gridless routing system with wire planning

J Cong, J Fang, KY Khoo - … of the 2000 international symposium on …, 2000 - dl.acm.org
In this paper, we present a multi-layer gridless detailed routing system with wire planning for
deep sub-micron (DSM) physical designs. It includes a multi-layer gridless detailed routing …

[CARTE][B] The computer engineering handbook

VG Oklobdzija - 2001 - taylorfrancis.com
There is arguably no field in greater need of a comprehensive handbook than computer
engineering. The unparalleled rate of technological advancement, the explosion of …

Evolutionary algorithms for the physical design of VLSI circuits

J Cohoon, J Kairo, J Lienig - Advances in evolutionary computing: theory …, 2003 - Springer
Electronic design automation (EDA) is concerned with the design and production of VLSI
systems. One of the important steps in creating a VLSI circuit is physical design. The input to …

A parallel genetic algorithm for performance-driven VLSI routing

J Lienig - IEEE Transactions on Evolutionary Computation, 1997 - ieeexplore.ieee.org
This paper presents a novel approach to solve the VLSI (very large scale integration)
channel and switchbox routing problems. The approach is based on a parallel genetic …

NCTU-GR: Efficient simulated evolution-based rerouting and congestion-relaxed layer assignment on 3-D global routing

KR Dai, WH Liu, YL Li - IEEE Transactions on very large scale …, 2011 - ieeexplore.ieee.org
The increasing complexity of interconnection designs has enhanced the importance of
research into global routing when seeking high-routability (low overflow) results or rapid …

A genetic algorithm for channel routing in VLSI circuits

J Lienig, K Thulasiraman - Evolutionary Computation, 1993 - direct.mit.edu
A new genetic algorithm for channel routing in the physical design process of VLSI circuits is
presented. The algorithm is based on a problem-specific representation scheme and …

[CARTE][B] Evolutionary algorithms for VLSI CAD

R Drechsler - 2013 - books.google.com
In VLSI CAD, difficult optimization problems have to be solved on a constant basis. Various
optimization techniques have been proposed in the past. While some of these methods have …