High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-level Bayesian Optimization

J Lu, Y Li, F Yang, L Shang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Designing high-performance-modulators is a challenging task, often involving a time-
consuming, manual topology search process. We present an automated topology synthesis …

Automated topology synthesis of analog and RF integrated circuits: A survey

SE Sorkhabi, L Zhang - Integration, 2017 - Elsevier
The puzzle of automatically synthesizing analog and radio frequency (RF) circuit topology
has not yet been offered with an industrially-acceptable solution although endeavors still …

A Methodology for Generation of Performance Models for the Sizing of Analog High‐Level Topologies

S Pandit, C Mandal, A Patra - VLSI Design, 2011 - Wiley Online Library
This paper presents a systematic methodology for the generation of high‐level performance
models for analog component blocks. The transistor sizes of the circuit‐level …

Macromodeling and Synthesis of Analog Circuits

BS Patro, SK Mandal - Advanced VLSI Design and Testability …, 2020 - taylorfrancis.com
Different synthesis approaches such as knowledge-based approach, equation-based
approach, and simulation-based approach are widely used for synthesis of analog circuits …