The Compute Express Link (CXL) is an open industry-standard interconnect between
processors and devices such as accelerators, memory buffers, smart network interfaces …

Public cloud providers seek to meet stringent performance requirements and low hardware
cost. A key driver of performance and cost is main memory. Memory pooling promises to …

Data movement between the processing units and the memory in traditional von Neumann
architecture is creating the" memory wall" problem. To bridge the gap, two approaches, the …

Memory isolation is a key property of a reliable and secure computing system--an access to
one memory address should not have unintended side effects on data stored in other …

The RowHammer vulnerability in DRAM is a critical threat to system security. To protect
against RowHammer, vendors commit to security-through-obscurity: modern DRAM chips …

Physically Unclonable Functions (PUFs) are commonly used in cryptography to identify
devices based on the uniqueness of their physical microstructures. DRAM-based PUFs have …

The energy consumption of DRAM is a critical concern in modern computing systems.
Improvements in manufacturing process technology have allowed DRAM vendors to lower …

As Dynamic Random Access Memories (DRAM) scale, they are becoming increasingly
susceptible to Row Hammer. By rapidly activating rows of DRAM cells (aggressor rows) …

Multirate refresh techniques exploit the non-uniformity in retention times of DRAM cells to
reduce the DRAM refresh overheads. Such techniques rely on accurate profiling of retention …

DRAM is the building block of modern main memory systems. DRAM cells must be
periodically refreshed to prevent data loss. Refresh operations degrade system performance …