High-density low voltage non-volatile memory with unidirectional plate-line and bit-line and pillar capacitor
Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory
bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material …
bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material …
Pulsing scheme for a ferroelectric memory bit-cell to minimize read or write disturb effect and refresh logic
A memory is provided which comprises a capacitor including non-linear polar material. The
capacitor may have a first terminal coupled to a node (eg, a storage node) and a second …
capacitor may have a first terminal coupled to a node (eg, a storage node) and a second …
Stacked ferroelectric non-planar capacitors in a memory bit-cell
A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that includes a
planar ferroelectric or paraelectric capacitor. The memory bit-cell comprises 1T1C …
planar ferroelectric or paraelectric capacitor. The memory bit-cell comprises 1T1C …
Non-linear polar material based memory bit-cell with multi-level storage by applying different voltage levels
(57) ABSTRACT A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
Writing scheme for 1TnC ferroelectric memory bit-cell with plate-lines parallel to a bit-line and with individual switches on the plate-lines of the bit-cell
G11C11/401—Digital stores characterised by the use of particular electric or magnetic
storage elements; Storage elements therefor using electric elements using semiconductor …
storage elements; Storage elements therefor using electric elements using semiconductor …
Multi-metal lateral layer devices with internal bias generation
M Pe - US Patent 11,961,910, 2024 - Google Patents
A ferroelectric capacitor or a ferroelectric transistor may include a first metal layer having a
first metal having a first work function, and a second metal layer having a second metal …
first metal having a first work function, and a second metal layer having a second metal …
Stacked ferroelectric planar capacitors in a memory bit-cell
(57) ABSTRACT A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
Method of forming stacked ferroelectric non-planar capacitors in a memory bit-cell
(57) ABSTRACT A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
includes a planar ferroelectric or para electric capacitor. The memory bit-cell comprises …
Memory circuit, system and method for rapid retrieval of data sets
E Harari - US Patent 12,002,523, 2024 - Google Patents
A 3-dimensional array of NOR memory strings being organized by planes of NOR memory
strings, in which (i) the storage transistors in the NOR memory strings situated in a first group …
strings, in which (i) the storage transistors in the NOR memory strings situated in a first group …
Reading scheme for 1TNC ferroelectric memory bit-cell with plate-line parallel to bit-line and with individual switches on plate-lines of the bit-cell
G11C11/401—Digital stores characterised by the use of particular electric or magnetic
storage elements; Storage elements therefor using electric elements using semiconductor …
storage elements; Storage elements therefor using electric elements using semiconductor …