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Design methodology of fault-tolerant custom 3D network-on-chip
KSM Li, SJ Wang - ACM Transactions on Design Automation of …, 2017 - dl.acm.org
A systematic design methodology is presented for custom Network-on-Chip (NoC) in three-
dimensional integrated circuits (3D-ICs). In addition, fault tolerance is supported in the NoC …
dimensional integrated circuits (3D-ICs). In addition, fault tolerance is supported in the NoC …
A novel fault tolerant switch for reliable NoC design
Network on chip (NoC) is a design space covered by the manifold combinations of network
topology options, routing algorithms, switch architectures, fault tolerant mechanisms and so …
topology options, routing algorithms, switch architectures, fault tolerant mechanisms and so …
Supporting faulty banks in NUCA by NoC assisted remap** mechanisms
KC Chang, CY Chen, CS Yu, CW Chen - The Journal of Supercomputing, 2014 - Springer
The many-core SoC is a future trend technology, and the process yield will face many
unpredictable challenges. Nonuniform cache architecture (NUCA) can improve the …
unpredictable challenges. Nonuniform cache architecture (NUCA) can improve the …
[ОПИСАНИЕ][C] 基于内建自测技术的 Mesh 结构 NoC 无虚通道容错路由算法
姚磊， 蔡觉**， **赞， 张海林， 王韶力 - 电子学报, 2012
[ОПИСАНИЕ][C] 一种高吞吐低延时 NoC 容错路由算法
韦良芬， 张佑生， 王勇 - 安徽工业大学学报: 自然科学版, 2014
[ОПИСАНИЕ][C] 2D-Mesh 结构片上网络无虚通道容错路由算法
姚磊， 蔡觉**， **赞， 张海林， 王韶力 - 西安电子科技大学学报, 2012
[ОПИСАНИЕ][C] 片上网络容错路由算法分析和评价
**本娟， 王嘉芳， 姜誉， **旭亮 - 智能计算机与应用, 2011
[ОПИСАНИЕ][C] 情感变异的语音语料库的设计和构建
金玉卿， 吕成国 - 智能计算机与应用, 2011