Ultrathin (<4 nm) and Si–O–N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

ML Green, EP Gusev, R Degraeve… - Journal of Applied …, 2001 - pubs.aip.org
The outstanding properties of SiO 2, which include high resistivity, excellent dielectric
strength, a large band gap, a high melting point, and a native, low defect density interface …

Reliability limits for the gate insulator in CMOS technology

JH Stathis - IBM Journal of Research and Development, 2002 - ieeexplore.ieee.org
Aggressive scaling of the thickness of the gate insulator in CMOS transistors has caused the
quality and reliability of ultrathin dielectrics to assume greater importance. This paper …

Heterojunction tunnel triodes based on two-dimensional metal selenide and three-dimensional silicon

J Miao, C Leblanc, J Wang, Y Gu, X Liu, B Song… - Nature …, 2022 - nature.com
Low power consumption in the static and dynamic modes of operation is a key requirement
in the development of modern electronics. Tunnel field-effect transistors with direct band-to …

Dielectric breakdown mechanisms in gate oxides

S Lombardo, JH Stathis, BP Linder, KL Pey… - Journal of applied …, 2005 - pubs.aip.org
In this paper we review the subject of oxide breakdown (BD), focusing our attention on the
case of the gate dielectrics of interest for current Si microelectronics, ie, Si oxides or …

[КНИГА][B] The VLSI handbook

WK Chen - 1999 - taylorfrancis.com
Over the years, the fundamentals of VLSI technology have evolved to include a wide range
of topics and a broad range of practices. To encompass such a vast amount of knowledge …

Physical and predictive models of ultrathin oxide reliability in CMOS devices and circuits

JH Stathis - IEEE Transactions on device and materials …, 2001 - ieeexplore.ieee.org
The microelectronics industry owes its considerable success largely to the existence of the
thermal oxide of silicon. However, recently there is concern that the reliability of ultra-thin …

NBTI enhancement by nitrogen incorporation into ultrathin gate oxide for 0.10-/spl mu/m gate CMOS generation

N Kimizuka, K Yamaguchi, K Imai… - 2000 Symposium on …, 2000 - ieeexplore.ieee.org
We investigated the degradation of device reliability due to Negative Bias Temperature
Instability (NBTI) of PMOSFET with ultrathin gate oxide. It was experimentally demonstrated …

Ultrathin gate oxide reliability: Physical models, statistics, and characterization

JS Suehle - IEEE Transactions on Electron Devices, 2002 - ieeexplore.ieee.org
The present understanding of wear-out and breakdown in ultrathin (t/sub ox/< 5.0 nm)
SiO/sub 2/gate dielectric films and issues relating to reliability projection are reviewed in this …

Power-law voltage acceleration: A key element for ultra-thin gate oxide reliability

EY Wu, J Suné - Microelectronics reliability, 2005 - Elsevier
The properties of the so-called time dependent dielectric breakdown (TDDB) of silicon
dioxide-based gate dielectric for microelectronics technology have been investigated and …

[HTML][HTML] Intrinsic SiOx-based unipolar resistive switching memory. II. Thermal effects on charge transport and characterization of multilevel programing

YF Chang, B Fowler, YC Chen, YT Chen… - Journal of Applied …, 2014 - pubs.aip.org
Multilevel programing and charge transport characteristics of intrinsic SiO x-based resistive
switching memory are investigated using TaN/SiO x/n++ Si (MIS) and TiW/SiO x/TiW (MIM) …