Asynchronous circuits as an enabler of scalable and programmable metasurfaces

L Petrou, P Karousios… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Metamaterials and metasurfaces have given possibilities for manipulating electromagnetic
(EM) waves that in the past would have seemed impossible. The majority of metasurface …

Probability-driven multibit flip-flop integration with clock gating

D Gluzer, S Wimer - IEEE Transactions on Very Large Scale …, 2016 - ieeexplore.ieee.org
Data-driven clock gated (DDCG) and multibit flip-flops (MBFFs) are two low-power design
techniques that are usually treated separately. Combining these techniques into a single …

0.2 V 8T SRAM with PVT-aware bitline sensing and column-based data randomization

AT Do, ZC Lee, B Wang, IJ Chang… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
In sub/near-threshold operation, SRAMs suffer from considerable bitline swing degradation
when the data pattern of a column is skewed to1'or0'. The worst scenarios regarding this …

A CDM-like damage mechanism for multiple power domains fabricated with deep n-well processes

YL Chu, HY Kuo, JW Young, YS Tsai… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
In this paper, a mechanism of CDM (Charged-Device Model)-like damage is observed
across separated power domain interfaces fabricated with DNW (Deep N-well) processes …

Concept for a security aware automatic fare collection system using HF/UHF dual band RFID transponders

L Zöscher, J Grosinger, R Spreitzer… - 2015 45th European …, 2015 - ieeexplore.ieee.org
Established automatic fare collection (AFC) solutions for public transport systems that use
proximity HF radio frequency identification (RFID) smart cards are lacking a convenient …

Generation of Mixed-Driving Multi-Bit Flip-Flops for Power Optimization

MY Liu, YC Lai, WK Mak, TC Wang - Proceedings of the 41st IEEE/ACM …, 2022 - dl.acm.org
Multi-bit flip-flops (MBFFs) are often used to reduce the number of clock sinks, resulting in a
low-power design. A traditional MBFF is composed of individual FFs of uniform driving …

A 32 kb 9T near-threshold SRAM with enhanced read ability at ultra-low voltage operation

TTH Kim, ZC Lee, AT Do - Solid-State Electronics, 2018 - Elsevier
Ultra-low voltage SRAMs are highly sought-after in energy-limited systems such as battery-
powered and self-harvested SoCs. However, ultra-low voltage operation diminishes SRAM …

A new mechanism of signal path charging damage across separated power domain deep N-Well interface

YL Chu, HY Kuo, SF Hsu, YS Tsai… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
In this paper, a new mechanism of signal path charging damage is observed across a
separated power domain interface from the non-DNW (Deep N-Well) to DNW region. This …

Virtual-Tile-Based Flip-Flop Alignment Methodology for Clock Network Power Optimization

T Kwon, M Imran, DZ Pan… - IEEE Transactions on Very …, 2020 - ieeexplore.ieee.org
Clock network plays the most significant role in power consumption in IC design. Since a
clock network normally has a high switching ratio, power optimization of the clock network is …

Introduction of a new technique for simultaneous reduction of the delay and leakage current in digital circuits

H Mohammadian, MB Tavakolib, F Setoudeh, A Horri - Integration, 2021 - Elsevier
By the reduction in the size of transistors and the development of submicron technology, as
well as the construction of more integrated circuits on chips, leakage power has become one …