Duty cycle correction system and low dropout (LDO) regulator based delay-locked loop (DLL)

A Martin, R Cheng, H Venkatramani, N Dour… - US Patent …, 2021 - Google Patents
An apparatus is provided, where the apparatus includes a plurality of components; a first
circuitry to generate a clock signal, and to supply the clock signal to the plurality of …

Low power device for high-speed time-interleaved sampling

PW Neto, R Casey, D Carey - US Patent 10,911,060, 2021 - Google Patents
Apparatus and associated methods relate to a time-inter leaved integrating sampling front-
end circuit using integrat ing buffers. In an illustrative example, a circuit may include N …

Duty-cycle corrector circuit

LIN WeiShuo - US Patent 12,199,618, 2025 - Google Patents
A duty-cycle corrector circuit produces a clock signal with a given duty cycle (eg, fifty
percent) or with a substantially given duty cycle. The DC corrector circuit includes a delay …

Duty cycle correction system and low dropout (LDO) regulator based delay-locked loop (DLL)

A Martin, R Cheng, H Venkatramani, N Dour… - US Patent …, 2023 - Google Patents
An apparatus is provided, where the apparatus includes a plurality of components; a first
circuitry to generate a clock signal, and to supply the clock signal to the plurality of …