Memristors based on 2D materials as an artificial synapse for neuromorphic electronics

W Huh, D Lee, CH Lee - Advanced materials, 2020 - Wiley Online Library
The memristor, a composite word of memory and resistor, has become one of the most
important electronic components for brain‐inspired neuromorphic computing in recent years …

Review and projections of integrated cooling systems for three-dimensional integrated circuits

SG Kandlikar - Journal of Electronic Packaging, 2014 - asmedigitalcollection.asme.org
In an effort to increase processor speeds, 3D IC architecture is being aggressively pursued
by researchers and chip manufacturers. This architecture allows extremely high level of …

Wireless NoC as interconnection backbone for multicore chips: Promises and challenges

S Deb, A Ganguly, PP Pande… - IEEE Journal on …, 2012 - ieeexplore.ieee.org
Current commercial systems-on-chips (SoCs) designs integrate an increasingly large
number of predesigned cores and their number is predicted to increase significantly in the …

Networks-on-chip in a three-dimensional environment: A performance evaluation

BS Feero, PP Pande - IEEE Transactions on computers, 2008 - ieeexplore.ieee.org
The Network-on-Chip (NoC) paradigm has emerged as a revolutionary methodology for
integrating a very high number of intellectual property (IP) blocks in a single die. The …

[CARTE][B] Three-dimensional integrated circuit design

VF Pavlidis, I Savidis, EG Friedman - 2017 - books.google.com
Three-Dimensional Integrated Circuit Design, Second Eition, expands the original with more
than twice as much new content, adding the latest developments in circuit models …

Scalable hybrid wireless network-on-chip architectures for multicore systems

A Ganguly, K Chang, S Deb, PP Pande… - IEEE Transactions …, 2010 - ieeexplore.ieee.org
Multicore platforms are emerging trends in the design of System-on-Chips (SoCs).
Interconnect fabrics for these multicore SoCs play a crucial role in achieving the target …

3-D technology assessment: Path-finding the technology/design sweet-spot

P Marchal, B Bougard, G Katti, M Stucchi… - Proceedings of the …, 2009 - ieeexplore.ieee.org
It is widely acknowledged that three-dimensional (3-D) technologies offer numerous
opportunities for system design. In recent years, significant progress has been made on …

MIRA: A multi-layered on-chip interconnect router architecture

D Park, S Eachempati, R Das, AK Mishra… - ACM SIGARCH …, 2008 - dl.acm.org
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the
interconnect delay problem for designing CMP/multi-core/SoC systems in deep sub-micron …

Networks-on-chip in emerging interconnect paradigms: Advantages and challenges

LP Carloni, P Pande, Y **e - 2009 3rd ACM/IEEE International …, 2009 - ieeexplore.ieee.org
Communication plays a crucial role in the design and performance of multi-core systems-on-
chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to …

[PDF][PDF] Survey of network-on-chip proposals

E Salminen, A Kulmala, TD Hamalainen - white paper, OCP-IP, 2008 - academia.edu
This paper gives an overview of state-of-the-art regarding the network-on-chip (NoC)
proposals. NoC paradigm replaces dedicated, design-specific wires with scalable, general …