Post-silicon nano-electronic device and its application in brain-inspired chips
Y Lv, H Chen, Q Wang, X Li, C **e… - Frontiers in …, 2022 - frontiersin.org
As information technology is moving toward the era of big data, the traditional Von-Neumann
architecture shows limitations in performance. The field of computing has already struggled …
architecture shows limitations in performance. The field of computing has already struggled …
[PDF][PDF] Synthesizing Instruction Selection Rewrite Rules from RTL using SMT.
Creating a compiler for an instruction set architecture (ISA) requires a set of rewrite rules
describing how to translate from the compiler's intermediate representation (IR) to the ISA …
describing how to translate from the compiler's intermediate representation (IR) to the ISA …
Efficiently Synthesizing a Complete Set of Unique Instruction Selection Rewrite Rules Using SMT
R Daly - 2024 - search.proquest.com
With the ever-evolving landscape of computer architecture, we are witnessing an influx of
novel intermediate representations (IRs) and instruction set architectures (ISAs). These …
novel intermediate representations (IRs) and instruction set architectures (ISAs). These …
Efficiently Synthesizing Lowest Cost Rewrite Rules for Instruction Selection
Compiling programs to an instruction set architecture (ISA) requires a set of rewrite rules that
map patterns consisting of compiler instructions to patterns consisting of ISA instructions. We …
map patterns consisting of compiler instructions to patterns consisting of ISA instructions. We …
Toward Memristive Phase‐Change Neural Network with High‐Quality Ultra‐Effective Highly‐Self‐Adjustable Online Learning
KG Lim, SX Go, CC Tan, Y Jiang, K Cai… - Advanced Physics …, 2024 - Wiley Online Library
Memristive hardware with reconfigurable conductance levels are leading candidates for
achieving artificial neural networks (ANNs). However, owing to difficulties in device …
achieving artificial neural networks (ANNs). However, owing to difficulties in device …
Invulnerability invariants for software controlled speculation
Spectre class of transient execution security attacks on modern microprocessors rely on
speculative execution. Software Controlled Speculation (SCS) was proposed as a …
speculative execution. Software Controlled Speculation (SCS) was proposed as a …
A Quantile-Based SUM/MAX Operating Method for Statistical Timing Analysis
Instead of expressing the delay distribution shape with complicated forms, we propose a
quantile-based statistical SUM/MAX operating method by converting the distribution to …
quantile-based statistical SUM/MAX operating method by converting the distribution to …
An Accurate Statistical Cell Delay Model Considering Multiple-Input Switching Effect
To restrict the storage overhead, traditional statistical static timing analysis (SSTA) employs
a delay model that assumes only a single input switches for a cell during a transition, while …
a delay model that assumes only a single input switches for a cell during a transition, while …
On the role of reconfigurable systems in domain-specific computing
D Conficconi - 2021 - politesi.polimi.it
Computer architectures field is facing technological and architectural obstacles that are
limiting the general-purpose processor scaling in the delivered performance at a reasonable …
limiting the general-purpose processor scaling in the delivered performance at a reasonable …