Software-defined Radio (SDR) is a programmable transceiver with the capability of
operating various wireless communication protocols without the need to change or update …

Develo** high performance embedded vision applications requires balancing run-time
performance with energy constraints. Given the mix of hardware accelerators that exist for …

Develo** efficient embedded vision applications requires exploring various algorithmic
optimization trade-offs and a broad spectrum of hardware architecture choices. This makes …

The pairing of traditional multicore processors with accelerators of various forms (eg,
graphics engines, reconfigurable logic) can be referred to generally as architecturally …

An indispensable part of our modern life is scientific computing which is used in large-scale
high-performance systems as well as in low-power smart cyber-physical systems. Hence …

With the end of Dennard scaling and Moore's law, it is becoming increasingly difficult to build
hardware for emerging applications that meet power and performance targets, while …

Federated learning (FL), particularly when data is distributed across multiple clients, helps
reducing the learning time by avoiding training on a massive pile-up of data. Nonetheless …

A sparse matrix-matrix multiplication (SpMM) accelerator with 48 heterogeneous cores and
a reconfigurable memory hierarchy is fabricated in 40-nm CMOS. The compute fabric …

Deep neural networks (DNNs) have been widely adopted in many domains, including
computer vision, natural language processing, and medical care. Recent research reveals …

The heterogeneous computing paradigm represents a real programming challenge due to
the proliferation of devices with different hardware characteristics. Recently Intel introduced …