We survey recent developments in high level synthesis technology for VLSI design. The
need for higher-level design automation tools are discussed first. We then describe some …

Rapid advances in microelectronic integration and the advent of Systems-on-Chip have
fueled the need for high-level synthesis, ie, an automated approach to the synthesis of …

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for
analysis, characterization, estimation, and optimization of the various forms of power …

Operation scheduling (OS) is a fundamental problem in map** an application to a
computational device. It takes a behavioral application specification and produces a …

Scheduling algorithms used in compilers traditionally focus on goals such as reducing
schedule length and register pressure or producing compact code. In the context of a …

High-level Synthesis or HLS represented an ambitious attempt by the community to provide
capabilities for “algorithms to gates” for a period of almost three decades. The technical …

This paper presents a new operation chaining reconfigurable scheduling algorithm (CRS)
based on list scheduling that maximizes instruction level parallelism available in distributed …

The growing complexity of digital signal processing applications implemented in
programmable logic and embedded processors make a compelling case the use of high …

Operation scheduling (OS) is an important task in the high-level synthesis process. An
inappropriate scheduling of the operations can fail to exploit the full potential of the system …

Pipelining is an effective method to optimize the execution of a loop, especially for digital
signal processing (DSP) applications where data enter a circuit regularly. In this tutorial, the …