Design of high robustness BNN inference accelerator based on binary memristors
In-memory computing based on memristor is a promising solution to accelerate on-chip
deep neural networks. Concerning the nonideal factors of the device analog behaviors …
deep neural networks. Concerning the nonideal factors of the device analog behaviors …
Simulation of low power self-selective memristive neural networks for in situ digital and analogue artificial neural network applications
C Tsioustas, P Bousoulas, J Hadfield… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
Self-selective memory devices are considered promising candidates for suppressing the
undesired sneak path currents that appear within crossbar memory structures and …
undesired sneak path currents that appear within crossbar memory structures and …
In-memory computing for machine learning and deep learning
In-memory computing (IMC) aims at executing numerical operations via physical processes,
such as current summation and charge collection, thus accelerating common computing …
such as current summation and charge collection, thus accelerating common computing …
Reconfigurable smart in-memory computing platform supporting logic and binarized neural networks for low-power edge devices
Edge computing has been shown to be a promising solution that could relax the burden
imposed onto the network infrastructure by the increasing amount of data produced by smart …
imposed onto the network infrastructure by the increasing amount of data produced by smart …
Neural network design via voltage-based resistive processing unit and diode activation function-a new architecture
In recent years, the architecture based on Resistive Processing Unit (RPU) has become a
hot topic due to its potential to accelerate training of a Neural Network (NN). However …
hot topic due to its potential to accelerate training of a Neural Network (NN). However …
Hybrid analog-digital sensing approach for low-power real-time anomaly detection in drones
With the rapid growth of the use of Machine Learning (ML) techniques in Unmanned Aerial
Vehicles (UAVs), there is an opportunity to use ML techniques to detect and prevent …
Vehicles (UAVs), there is an opportunity to use ML techniques to detect and prevent …
Inference dropouts in binary weighted analog memristive crossbar
Miniaturization and energy efficiency are essential for building reliable edge AI computing
devices using memristive crossbar accelerators. We propose that stochastic dropouts in …
devices using memristive crossbar accelerators. We propose that stochastic dropouts in …
An in-flash binary neural network accelerator with SLC NAND flash array
WH Choi, PF Chiu, W Ma, G Hemink… - … on Circuits and …, 2020 - ieeexplore.ieee.org
An SLC NAND array based in-flash computing core is proposed for enabling vector-matrix
multiplications in binarized neural network (BNN) and binary weight network (BWN). Two …
multiplications in binarized neural network (BNN) and binary weight network (BWN). Two …
Realization of binary neural networks in NAND memory arrays
Use of a NAND array architecture to realize a binary neural network (BNN) allows for matrix
multiplication and accumulation to be performed within the memory array. A unit synapse for …
multiplication and accumulation to be performed within the memory array. A unit synapse for …
Realization of neural networks with ternary inputs and binary weights in NAND memory arrays
TT Hoang, WH Choi, M Lueker-boden - US Patent 11,170,290, 2021 - Google Patents
Use of a NAND array architecture to realize a binary neural network (BNN) allows for matrix
multiplication and accumulation to be performed within the memory array. A unit synapse for …
multiplication and accumulation to be performed within the memory array. A unit synapse for …