Comprehensive study of 1-bit full adder cells: review, performance comparison and scalability analysis

M Hasan, AH Siddique, AH Mondol, M Hossain… - SN Applied …, 2021 - Springer
Full Adder (FA) circuits are integral components in the design of Arithmetic Logic Units
(ALUs) of modern computing systems. Recently, there have been massive research interests …

1-Bit FinFET carry cells for low voltage high-speed digital signal processing applications

CS Pittala, V Vijay, BNK Reddy - Silicon, 2023 - Springer
In this paper, new high speed and low voltage 1-bit FinFET full adder carry cells are
proposed for multi-bit arithmetic applications used in Digital Signal Processing (DSP) …

A high-speed and scalable XOR-XNOR-based hybrid full adder design

M Hasan, MS Hussain, M Hossain, M Hasan… - Computers & Electrical …, 2021 - Elsevier
This work presents the design of a scalable and full-swing Full Adder (FA) based on the
XOR-XNOR module. The performance of the design has been compared with eleven …

A high‐performance full swing 1‐bit hybrid full adder cell

S Hussain, M Hasan, G Agrawal… - IET Circuits, Devices & …, 2022 - Wiley Online Library
This study proposes an 18‐transistor full adder (FA) cell based on the full swing hybrid logic
style. It has a first stage comprising the XOR‐XNOR module followed by pass transistors and …

High-efficient, ultra-low-power and high-speed 4: 2 compressor with a new full adder cell for bioelectronics applications

A Sadeghi, N Shiri, M Rafiee - Circuits, Systems, and Signal Processing, 2020 - Springer
Size reduction in complementary metal–oxide–semiconductor integrated circuits (ICs) is a
challenge. Carbon nanotube field effect transistor (CNTFET) technology with advantages …

High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures

N Shiri, A Sadeghi, M Rafiee - Computers and Electrical Engineering, 2023 - Elsevier
Two new approximate full adders (FAs) are proposed by the multiplexers (MUXs) and OR
gates with the gate diffusion input (GDI) technique. The cells are named GDI-based MUX …

High efficient GDI-CNTFET-based approximate full adder for next generation of computer architectures

A Sadeghi, R Ghasemi, H Ghasemian… - IEEE Embedded …, 2022 - ieeexplore.ieee.org
Approximate computing (AC) is an emerging technique in arithmetic circuits. In this letter, a
new AC-based full adder (FA) circuit is presented with 12 transistors, 150mm] Please …

High-performance 1-bit full adder with excellent driving capability for multistage structures

M Rafiee, N Shiri, A Sadeghi - IEEE Embedded Systems Letters, 2021 - ieeexplore.ieee.org
In this letter, a low-power 1-bit full-adder (FA) cell is proposed based on the transmission
gate (TG) to attain a special module for generating full-swing Carry output. The cell benefits …

An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

M Rafiee, F Pesaran, A Sadeghi, N Shiri - Microelectronics Journal, 2021 - Elsevier
Different digital multipliers have resulted from various algorithms and hardware designs.
This article presents a high-performance multiplier by a novel AND gate and a modified …

Tolerant and low power subtractor with 4: 2 compressor and a new TG‐PTL‐float full adder cell

A Sadeghi, N Shiri, M Rafiee… - IET Circuits, Devices & …, 2022 - Wiley Online Library
A new 1‐bit full adder (FA) cell illustrating low‐power, high‐speed, and a small area is
presented by a combination of transmission gate (TG), pass transistor logic (PTL), and float …