Manufacturing-aware physical design
Ultra-deep submicron manufacturability impacts physical design (PD) through complex
layout rules and large guard-bands for process variability; this creates new requirements for …
layout rules and large guard-bands for process variability; this creates new requirements for …
[BOG][B] VLSI test principles and architectures: design for testability
This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …
design a testable and quality product, drive down test cost, improve product quality and …
Statistical timing analysis: From basic principles to state of the art
Static-timing analysis (STA) has been one of the most pervasive and successful analysis
engines in the design of digital circuits for the last 20 years. However, in recent years, the …
engines in the design of digital circuits for the last 20 years. However, in recent years, the …
Statistical timing analysis considering spatial correlations using a single PERT-like traversal
H Chang, SS Sapatnekar - ICCAD-2003. International …, 2003 - ieeexplore.ieee.org
We present an efficient statistical timing analysis algorithm that predicts the probability
distribution of the circuit delay while incorporating the effects of spatial correlations of intra …
distribution of the circuit delay while incorporating the effects of spatial correlations of intra …
Characterizing reference locality in the WWW
The authors propose models for both temporal and spatial locality of reference in streams of
requests arriving at Web servers. They show that simple models based on document …
requests arriving at Web servers. They show that simple models based on document …
[BOG][B] System-on-chip test architectures: nanometer design for testability
LT Wang, CE Stroud, NA Touba - 2010 - books.google.com
Modern electronics testing has a legacy of more than 40 years. The introduction of new
technologies, especially nanometer technologies with 90nm or smaller geometry, has …
technologies, especially nanometer technologies with 90nm or smaller geometry, has …
Morphology-based license plate detection from complex scenes
JW Hsieh, SH Yu, YS Chen - 2002 International Conference on …, 2002 - ieeexplore.ieee.org
This paper presents a morphology-based method for detecting license plates from cluttered
images. The proposed system consists of three major components. At the first, a morphology …
images. The proposed system consists of three major components. At the first, a morphology …
Statistical timing analysis under spatial correlations
H Chang, SS Sapatnekar - IEEE Transactions on Computer …, 2005 - ieeexplore.ieee.org
Process variations are of increasing concern in today's technologies, and they can
significantly affect circuit performance. An efficient statistical timing analysis algorithm that …
significantly affect circuit performance. An efficient statistical timing analysis algorithm that …
A technical survey on delay defects in nanoscale digital VLSI circuits
P Muthukrishnan, S Sathasivam - Applied Sciences, 2022 - mdpi.com
As technology scales down, digital VLSI circuits are prone to many manufacturing defects.
These defects may result in functional and delay-related circuit failures. The number of test …
These defects may result in functional and delay-related circuit failures. The number of test …
Block-based static timing analysis with uncertainty
A Devgan, C Kashyap - … on Computer Aided Design (IEEE Cat …, 2003 - ieeexplore.ieee.org
Static timing analysis is a critical step in design of any digital integrated circuit. Technology
and design trends have led to significant increase in environmental and process variations …
and design trends have led to significant increase in environmental and process variations …