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FinFETs and methods for forming the same
JJ Xu - US Patent 9,299,840, 2016 - Google Patents
(57) ABSTRACT A FinPET includes a semiconductor fin including an inner region, and a
germanium-doped layer on a top surface and sidewall Surfaces of the inner region. The …
germanium-doped layer on a top surface and sidewall Surfaces of the inner region. The …
Dual channel CMOS having common gate stacks
T Ando, H Jagannathan, CH Lee… - US Patent …, 2019 - Google Patents
Embodiments are directed to a method and resulting struc tures for a dual channel
complementary metal-oxide-semi conductor (CMOS) having common gate stacks. A first …
complementary metal-oxide-semi conductor (CMOS) having common gate stacks. A first …
Counter-doped low-power FinFET
M Lee - US Patent 8,853,008, 2014 - Google Patents
FinFETs and methods for making FinFETs are disclosed. A fin is formed on a substrate,
wherein the fin has a height greater than 2 to 6 times of its width, a length defining a channel …
wherein the fin has a height greater than 2 to 6 times of its width, a length defining a channel …
Fin structure of semiconductor device
CH Chen, TY Lee, YL Huang, CW Liu - US Patent 9,093,531, 2015 - Google Patents
The disclosure relates to a fin structure of a semiconductor device. An exemplary fin
structure for a semiconductor device comprises a lower portion protruding from a major …
structure for a semiconductor device comprises a lower portion protruding from a major …
Semiconductor device including fin structures and manufacturing method thereof
BACKGROUND As the semiconductor industry has progressed into nano meter technology
process nodes in pursuit of higher device density, higher performance, and lower costs …
process nodes in pursuit of higher device density, higher performance, and lower costs …
Semiconductor device and method of fabricating the same
A semiconductor device is provided. A substrate includes a fin. The fin extends in a first
direction. A gate structure is disposed on a first region of the fin. The gate structure extends …
direction. A gate structure is disposed on a first region of the fin. The gate structure extends …
Method for fabricating fin type transistor
HJ Joo, BK Kim, H Song, YB Joo, S Lee… - US Patent App. 14 …, 2015 - Google Patents
(57) ABSTRACT A method for fabricating a fin type transistor uniformly implants in targeted
regions. The method includes forming a fin protruding in a Z-axis direction from a Substrate …
regions. The method includes forming a fin protruding in a Z-axis direction from a Substrate …
Semiconductor device and method of fabricating the same
JH Kwon, Y Lee, H Lim, H Jang, E Chung - US Patent 9,978,865, 2018 - Google Patents
(57) ABSTRACT A semiconductor device includes first source/drain regions disposed at
both sides of a first gate structure and including dopants of a first conductivity type, counter …
both sides of a first gate structure and including dopants of a first conductivity type, counter …
Manufacturing method of a semiconductor device
S Yoo, DK Lee - US Patent 9,087,858, 2015 - Google Patents
US9087858B2 - Manufacturing method of a semiconductor device - Google Patents
US9087858B2 - Manufacturing method of a semiconductor device - Google Patents Manufacturing …
US9087858B2 - Manufacturing method of a semiconductor device - Google Patents Manufacturing …
FinFETs and methods for forming the same
JJ Xu - US Patent 9,806,177, 2017 - Google Patents
(57) ABSTRACT A FinFET includes a semiconductor fin including an inner region, and a
germanium-doped layer on a top surface and sidewall surfaces of the inner region. The …
germanium-doped layer on a top surface and sidewall surfaces of the inner region. The …