Recent advances in very-large-scale integration (VLSI) technologies have offered the
capability of integrating thousands of processing elements onto a single silicon microchip …

The structural redundancy inherent to on-chip interconnection networks [networks on chip
(NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity even …

Network congestion can limit performance of NoC due to increased transmission latency
and power consumption. Congestion-aware adaptive routing can greatly improve the …

Due to the increase in integrated circuit technology processing, there is intense flooding of
transistors on Multi-processor System-on-chips, making communication a more complex and …

Congestion occurs frequently in Networks-on-Chip when the packets demands exceed the
capacity of network resources. Congestion-aware routing algorithms can greatly improve the …

Hotspots are network-on-chip (NoC) routers or modules in multicore systems which
occasionally receive packetized data from other networked element producers at a rate …

Traffic regulation is an essential technology of networks-on-chip (NoC) to achieve
communication performance guarantees with effective use of the system interconnect and …

High reliability against undesirable effects is one of the key objectives in the design of on-
chip networks. This paper presents a very low cost fault-tolerant routing method to tolerate …

In this paper we propose a new congestion-aware routing algorithm. At the First step, this
algorithm splits NoC into a number of subnets. Then a global routing algorithm within each …

Abstract System on chip (SoC) is an integrated circuit in which components are
communicating through the bus interconnection system. Network on chip (NoC) is a …