The case for performance interfaces for hardware accelerators

R Iyer, J Ma, K Argyraki, G Candea… - Proceedings of the 19th …, 2023 - dl.acm.org
While systems designers are increasingly turning to hardware accelerators for performance
gains, realizing these gains is painstaking and error-prone. It can take several person …

QED and Symbolic QED: Dramatic Improvements in Pre-Silicon Verification and Post-Silicon Validation

K Devarajegowda, F Lonsing… - … and Trends® in …, 2024 - nowpublishers.com
Abstract System-on-Chips (SoCs) are an integral part of our lives. The complexity of SoCs
requires sophisticated tools and methods for ensuring functional correctness, especially in …

[KNIHA][B] Multi-Functional Interfaces for Accelerators

L Piccolboni - 2022 - search.proquest.com
Abstract Heterogeneous System-on-Chip (SoC) architectures combine general-purpose
processors with many accelerators, which are application-specific computing engines. By …

[CITÁCIA][C] Hector: Multi-level Paradigm in Hardware Synthesis

R Xu, Y **ao, J Luo, Y Liang