[BOOK][B] Reconfigurable computing: the theory and practice of FPGA-based computation

S Hauck, A DeHon - 2010 - books.google.com
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …

Flexible graphite-on-paper piezoresistive sensors

TL Ren, H Tian, D **e, Y Yang - Sensors, 2012 - mdpi.com
We demonstrate novel graphite-on-paper piezoresistive devices. The graphite was used as
sensing component. The fabrication process can be finished in a short time with simple tools …

Design and implementation of a virtual reconfigurable architecture for different applications of intrinsic evolvable hardware

J Wang, QS Chen, CH Lee - IET Computers & Digital Techniques, 2008 - IET
The authors present a novel virtual reconfigurable architecture (VRA) for realising real-world
applications of intrinsic evolvable hardware (EHW) on field programmable gate arrays …

Evolutionary fault tolerance method based on virtual reconfigurable circuit with neural network architecture

G Jian, Y Mengfei - IEEE transactions on evolutionary …, 2017 - ieeexplore.ieee.org
With the continuous development of computer and electronics, the idea of artificial
intelligence has been integrating into the fault tolerance research. As a valuable and …

An evolvable hardware system in **linx Virtex II Pro FPGA

Z Vasicek, L Sekanina - International Journal of Innovative …, 2007 - inderscienceonline.com
In this paper, a new circuit architecture for image filter evolution is proposed. The evolvable
system is based on the implementation of a search algorithm in the PowerPC processor …

Efficient phenotype evaluation in cartesian genetic programming

Z Vašíček, K Slaný - … : 15th European Conference, EuroGP 2012, Málaga …, 2012 - Springer
This paper describes an efficient acceleration technique designed to speedup the
evaluation of candidate solutions in Cartesian Genetic Programming (CGP). The method is …

A bird's eye view of FPGA-based Evolvable Hardware

F Cancare, S Bhandari, DB Bartolini… - 2011 NASA/ESA …, 2011 - ieeexplore.ieee.org
The Evolvable Hardware research area has achieved very important progresses in the last
two decades. However, it is still quite far from being as revolutionary as depicted in the …

Accelerating floating-point fitness functions in evolutionary algorithms: a FPGA-CPU-GPU performance comparison

JA Gomez-Pulido, MA Vega-Rodriguez… - … and Evolvable Machines, 2011 - Springer
Many large combinatorial optimization problems tackled with evolutionary algorithms often
require very high computational times, usually due to the fitness evaluation. This fact forces …

Advanced techniques for the creation and propagation of modules in cartesian genetic programming

P Kaufmann, M Platzner - Proceedings of the 10th annual conference on …, 2008 - dl.acm.org
The choice of an appropriate hardware representation model is key to successful evolution
of digital circuits. One of the most popular models is cartesian genetic programming, which …

On‐chip evolution of combinational logic circuits using an improved genetic‐simulated annealing algorithm

Q Shang, L Chen, P Peng - Concurrency and Computation …, 2020 - Wiley Online Library
This paper presents the on‐chip evolution system of combinational logic circuits by a new
hybrid algorithm known as improved genetic‐simulated annealing algorithm (IGASA). IGASA …