A comprehensive survey of federated transfer learning: challenges, methods and applications
Federated learning (FL) is a novel distributed machine learning paradigm that enables
participants to collaboratively train a centralized model with privacy preservation by …
participants to collaboratively train a centralized model with privacy preservation by …
A survey of FPGA optimization methods for data center energy efficiency
M Tibaldi, C Pilato - IEEE Transactions on Sustainable …, 2023 - ieeexplore.ieee.org
This article provides a survey of academic literature about field programmable gate array
(FPGA) and their utilization for energy efficiency acceleration in data centers. The goal is to …
(FPGA) and their utilization for energy efficiency acceleration in data centers. The goal is to …
F-tadoc: Fpga-based text analytics directly on compression with hls
Y Zhou, F Zhang, T Lin, Y Huang… - 2024 IEEE 40th …, 2024 - ieeexplore.ieee.org
With the development of loT and edge computing, data analytics on edge has become
popular, and text analytics directly on compression (TADOC) has been proven to be a …
popular, and text analytics directly on compression (TADOC) has been proven to be a …
On-cloud linking approach using a linkable glue layer for metamorphic edge devices
As sensors operating at the edge continue to evolve, the amount of data that edge devices
need to process is increasing. Cloud computing methods have been proposed to process …
need to process is increasing. Cloud computing methods have been proposed to process …
A high-efficiency lettuce quality detection system based on FPGA
Z Wang, T Li, R Du, N Yang, J ** - Computers and Electronics in …, 2025 - Elsevier
In recent years, hyperspectral imaging technology has been widely applied in agriculture;
however, its complex and redundant data poses significant challenges for implementation …
however, its complex and redundant data poses significant challenges for implementation …
Optimizing Tactile Feedback Devices with Fixed-Point Computation on FPGA
This article targets the implementation of a bilateral control algorithm for haptic devices on
FPGA platforms, using fixed-point arithmetic (FxP-F) to overcome latency and processing …
FPGA platforms, using fixed-point arithmetic (FxP-F) to overcome latency and processing …
FPGA-based acceleration architecture for Apache Spark operators
Y Sun, H Liu, X Liao, H **, Y Zhang - CCF Transactions on High …, 2024 - Springer
Apache Spark has been the most popular in-memory processing framework for big data
applications deployed in data centers. As a CPU-only parallel programming framework …
applications deployed in data centers. As a CPU-only parallel programming framework …
SVFF: An Automated Framework for SR-IOV Virtual Function Management in FPGA Accelerated Virtualized Environments
S Cirici, M Paolino, D Raho - 2023 International Conference on …, 2023 - ieeexplore.ieee.org
FPGA accelerator devices have emerged as a powerful platform for implementing high-
performance and scalable solutions in a wide range of industries, leveraging their …
performance and scalable solutions in a wide range of industries, leveraging their …
Layer Pipelined Neural Network Accelerator Design on 2.5 D FPGAs
M Wang, C Wu - 2024 IEEE 17th International Conference on …, 2024 - ieeexplore.ieee.org
The 2.5 D FPGA integrates 3 or 4 FPGA dies together for larger design capacity and higher
computing power. In this paper, we propose an advanced large neural network accelerator …
computing power. In this paper, we propose an advanced large neural network accelerator …