Scaling silicon-based quantum computing using CMOS technology

MF Gonzalez-Zalba, S De Franceschi, E Charbon… - Nature …, 2021 - nature.com
As quantum processors grow in complexity, attention is moving to the scaling prospects of
the entire quantum computing system, including the classical support hardware. Recent …

Characterization and modeling of self-heating in nanometer bulk-CMOS at cryogenic temperatures

PAT Hart, M Babaie, A Vladimirescu… - IEEE Journal of the …, 2021 - ieeexplore.ieee.org
This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient
temperature range from 300 K down to 4.2 K. A custom test chip was designed and …

A 40-nm cryo-CMOS quantum controller IC for superconducting qubit

K Kang, D Minn, S Bae, J Lee, S Kang… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The
proposed globally synchronized clock system internally generates different local oscillator …

A cryo-CMOS PLL for quantum computing applications

J Gong, E Charbon, F Sebastiano… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article presents the first cryogenic phase-locked loop (PLL) operating at 4.2 K. The PLL
is designed for the control system of scalable quantum computers. The specifications of PLL …

Scaling up superconducting quantum computers with cryogenic RF-photonics

S Joshi, S Moazeni - Journal of Lightwave Technology, 2023 - ieeexplore.ieee.org
Today's hundred-qubit quantum computers require a dramatic scale up to millions of qubits
to become practical for solving real-world problems. Although a variety of qubit technologies …

[HTML][HTML] Measurement of cryoelectronics heating using a local quantum dot thermometer in silicon

M de Kruijf, GM Noah, A Gomez-Saiz, JJL Morton… - Chip, 2024 - Elsevier
Silicon technology offers the enticing opportunity for monolithic integration of quantum and
classical electronic circuits. However, the power consumption levels of classical electronics …

Compaqt: Compressed waveform memory architecture for scalable qubit control

S Maurya, S Tannu - 2022 55th IEEE/ACM International …, 2022 - ieeexplore.ieee.org
On superconducting architectures, the state of a qubit is manipulated by using microwave
pulses. Typically, the pulses are stored in the waveform memory and then streamed to the …

Impact of Deep Cryogenic Temperatures on High-k Stacked Dual Gate Junctionless MOSFET Performance: Analog and RF analysis

R Ghosh, RP Nelapati - Silicon, 2024 - Springer
This article presents the reliability analysis of a High-k stacked Dual Gate Junction-less
MOSFET at Deep Cryogenic Temperatures (as low as 50 Kelvin) in terms of dc, analog and …

Cryogenic CMOS RF device modeling for scalable quantum computer design

Z Tang, Z Wang, A Guo, L Liu, C Cao… - IEEE Journal of the …, 2022 - ieeexplore.ieee.org
This paper presents experimental RF characterizations and modeling on the nano-scale
multi-finger gate MOSFETs of the HLMC 40 nm low-power CMOS technology. Both the …

XQsim: modeling cross-technology control processors for 10+ K qubit quantum computers

I Byun, J Kim, D Min, I Nagaoka, K Fukumitsu… - Proceedings of the 49th …, 2022 - dl.acm.org
10+ K qubit quantum computer is essential to achieve a true sense of quantum supremacy.
With the recent effort towards the large-scale quantum computer, architects have revealed …