Exact path delay fault coverage with fundamental ZBDD operations

S Padmanaban, MK Michael… - IEEE Transactions on …, 2003 - ieeexplore.ieee.org
We formulate the path delay fault (PDF) coverage problem as a combinatorial problem that
amounts to storing and manipulating sets using a special type of binary decision diagrams …

Self-test library generation for in-field test of path delay faults

L Anghel, R Cantoro, R Masante… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
New semiconductor technologies for advanced applications are more prone to defects and
imperfections related, among several different causes, to the manufacturing process, aging …

An implicit path-delay fault diagnosis methodology

S Padmanaban, S Tragoudas - IEEE Transactions on Computer …, 2003 - ieeexplore.ieee.org
The first nonenumerative framework for diagnosing path delay faults (PDFs) using zero
suppressed binary decision diagrams is introduced. We show that fault-free PDFs with …

Function-based compact test pattern generation for path delay faults

MK Michael, S Tragoudas - IEEE transactions on very large …, 2005 - ieeexplore.ieee.org
We present a function-based nonenumerative automatic test pattern generation (ATPG)
methodology for detecting path delay faults (PDFs). The proposed technique consists of a …

On the nonenumerative path delay fault simulation problem

D Kagaris, S Tragoudas - IEEE Transactions on Computer …, 2002 - ieeexplore.ieee.org
The problem of determining the exact number of path delay faults that a given test set
detects in a combinational circuit is shown to be intractable. This result further strengthens …

The impact of correlation on delay performance of high speed networks

Z Cui, AA Nilsson - … of 26th Southeastern Symposium on System …, 1994 - ieeexplore.ieee.org
This paper focuses on the impact of correlation on the delay performance of high speed
networks. Markov-modulated Poisson process (MMPP), which captures both burstiness and …

An efficient SAT-based path delay fault ATPG with an unified sensitization model

SY Lu, MT Hsieh, JJ Liou - 2007 IEEE International Test …, 2007 - ieeexplore.ieee.org
Automatic test pattern generation (ATPG) for path delay faults is an essential tool for
structurally testing performance problems of circuits. The complexity issues of an ATPG are …

An adaptive path delay fault diagnosis methodology [logic IC testing]

S Padmanaban, S Tragoudas - International Symposium on …, 2004 - ieeexplore.ieee.org
A framework to adaptively perform delay fault diagnosis is introduced. We propose a
methodology to perform diagnosis taking into account the effect of test vectors on the …

Performance evaluation of the hierarchical Hough transform on an associative M-SIMD architecture

ND Franics, GR Nudd, TJ Atherton… - [1990] Proceedings …, 1990 - ieeexplore.ieee.org
The application of multiple-single instruction multiple-data (M-SIMD) processing techniques
to the problem of finding straight lines in an image is described, and the advantages of using …

Non-enumerative path delay fault diagnosis [logic testing]

S Padmanaban, S Tragoudas - 2003 Design, Automation and …, 2003 - ieeexplore.ieee.org
The first non-enumerative framework for diagnosing path delay faults using zero suppressed
binary decision diagrams is introduced. We show that fault free path delay faults with a …