Multiplication is one of the widely used arithmetic operations in a variety of applications,
such as image/video processing and machine learning. FPGA vendors provide high …

The main focus of the existing approximate arithmetic circuits has been on ASIC-based
designs. However, due to the architectural differences between ASICs and FPGAs …

The architectural differences between ASICs and FPGAs limit the effective performance
gains achievable by the application of ASIC-based approximation principles for FPGA …

The focus of existing designs on approximate radix-8 Booth multipliers has been on ASIC-
based platforms. These multipliers are based on an approximation as defined for ASIC …

Multiplication is one of the most extensively used arithmetic operations in a wide range of
applications. In order to provide resource-efficient and high-performance multipliers …

Low-precision arithmetic operations to accelerate deep-learning applications on field-
programmable gate arrays (FPGAs) have been studied extensively, because they offer the …

Multiplication is the dominant operation for many applications implemented on field-
programmable gate arrays (FPGAs). Although most current FPGA families have embedded …

The design of a multiplier typically consists of three steps:(1) partial product generation,(2)
compressor tree design and (3) the selection of the final adder. Conventionally, these three …

Multiplication is one of the most extensively used arithmetic operations in a wide range of
applications, such as multimedia processing and artificial neural networks. For such …

This paper presents a simple but effective strategy to implement signed binary multipliers on
Field Programmable Gate Arrays (FPGAs). It is based on the radix-4 Booth's encoding logic …