Rediscovering majority logic in the post-CMOS era: A perspective from in-memory computing

J Reuben - Journal of low power Electronics and Applications, 2020 - mdpi.com
As we approach the end of Moore's law, many alternative devices are being explored to
satisfy the performance requirements of modern integrated circuits. At the same time, the …

FeFET based Logic-in-Memory: an overview

C Marchand, I O'Connor, M Cantan… - … on Design & …, 2021 - ieeexplore.ieee.org
Emerging non-volatile memories are getting new interest in the system design community.
They are used to design logic-in-memory circuits and propose alternatives to von-Neuman …

Cryptopim: In-memory acceleration for lattice-based cryptographic hardware

H Nejatollahi, S Gupta, M Imani… - 2020 57th ACM/IEEE …, 2020 - ieeexplore.ieee.org
Quantum computers promise to solve hard mathematical problems such as integer
factorization and discrete logarithms in polynomial time, making standardized public-key …

Accelerated addition in resistive RAM array using parallel-friendly majority gates

J Reuben, S Pechmann - … on Very Large Scale Integration (VLSI …, 2021 - ieeexplore.ieee.org
To overcome the “von Neumann bottleneck,” methods to compute in memory are being
researched in many emerging memory technologies, including resistive RAMs (ReRAMs) …

Towards Green AI. A methodological survey of the scientific literature

E Barbierato, A Gatti - IEEE Access, 2024 - ieeexplore.ieee.org
The pervasive deployment of Deep Learning models has recently prompted apprehensions
regarding their ecological footprint, owing to the exorbitant levels of energy consumption …

A flexible and reliable RRAM-based in-memory computing architecture for data-intensive applications

N Eslami, MH Moaiyeri - IEEE Transactions on Emerging …, 2023 - ieeexplore.ieee.org
This article proposes a practical, flexible, and reliable in-memory computing architecture for
resistive-memory-based logic designs. Our design uses a new RRAM-based polymorphic in …

[HTML][HTML] An efficient in-memory carry select adder realization using resistive switching crossbar array with Ti-doped VO2-based selector device

U Dilna, SN Prasad - Materials Science in Semiconductor Processing, 2024 - Elsevier
In-memory computing (IMC) can significantly increase speed efficiency by significantly
reducing the time and energy consumption of memory access. Therefore, efficient storage …

Analysis of logic-in-memory full adder circuit with floating gate field effect transistor (FGFET)

S Kim, I Choi, S Cho, M Kang, S Baik, C Ra… - IEEE Access, 2023 - ieeexplore.ieee.org
The high data throughput and high energy efficiency required recently are increasingly
difficult to implement due to the von Neumann bottleneck. As a way to overcome this, Logic …

Binary addition in resistance switching memory array by sensing majority

J Reuben - Micromachines, 2020 - mdpi.com
The flow of data between processing and memory units in contemporary computing systems
is their main performance and energy-efficiency bottleneck, often referred to as the 'von …

Exploring Multi‐Bit Logic In‐Memory with Memristive HfO2‐Based Ferroelectric Tunnel Junctions

W Kho, H Hwang, SE Ahn - Advanced Electronic Materials, 2024 - Wiley Online Library
The increasing demand for data movement and energy consumption in physically separate
von Neumann architectures, where the processor and memory are distinct entities …