Approximate computing survey, Part I: terminology and software & hardware approximation techniques

V Leon, MA Hanif, G Armeniakos, X Jiao… - ACM Computing …, 2023 - dl.acm.org
The rapid growth of demanding applications in domains applying multimedia processing
and machine learning has marked a new era for edge and cloud computing. These …

Exploiting dynamic timing slack for energy efficiency in ultra-low-power embedded systems

H Cherupalli, R Kumar, J Sartori - ACM SIGARCH Computer Architecture …, 2016 - dl.acm.org
Many emerging applications such as the internet of things, wearables, and sensor networks
have ultra-low-power requirements. At the same time, cost and programmability …

Clim: A cross-level workload-aware timing error prediction model for functional units

X Jiao, A Rahimi, Y Jiang, J Wang… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
Timing errors that are caused by the timing violations of sensitized circuit paths, have
emerged as an important threat to the reliability of synchronous digital circuits. To protect …

Low-power variation-aware cores based on dynamic data-dependent bitwidth truncation

I Tsiokanos, L Mukhanov… - … Design, Automation & …, 2019 - ieeexplore.ieee.org
Increasing variability of transistor parameters in nanoscale era renders modern circuits
prone to timing failures. To address such failures, designers adopt pessimistic timing/voltage …

Accurate estimation of dynamic timing slacks using event-driven simulation

D Garyfallou, I Tsiokanos… - … on Quality Electronic …, 2020 - ieeexplore.ieee.org
The pessimistic nature of conventional static timing analysis has turned the attention of many
studies to the exploitation of the dynamic data-dependent excitation of paths. Such studies …

DTA-PUF: Dynamic timing-aware physical unclonable function for resource-constrained devices

I Tsiokanos, J Miskelly, C Gu, M O'neill… - ACM Journal on …, 2021 - dl.acm.org
In recent years, physical unclonable functions (PUFs) have gained a lot of attention as
mechanisms for hardware-rooted device authentication. While the majority of the previously …

Benchiot: A security benchmark for the internet of things

NS Almakhdhub, AA Clements… - 2019 49th Annual …, 2019 - ieeexplore.ieee.org
Attacks against IoT systems are increasing at an alarming pace. Many IoT systems are and
will be built using low-cost micro-controllers (IoT-uCs). Different security mechanisms have …

Slot: A supervised learning model to predict dynamic timing errors of functional units

X Jiao, Y Jiang, A Rahimi… - Design, Automation & Test …, 2017 - ieeexplore.ieee.org
Dynamic timing errors (DTEs), that are caused by the timing violations of sensitized critical
timing paths, have emerged as an important threat to the reliability of digital circuits. Existing …

Boosting microprocessor efficiency: Circuit-and workload-aware assessment of timing errors

I Tsiokanos, G Papadimitriou… - 2021 IEEE …, 2021 - ieeexplore.ieee.org
Aggressive technology scaling and increased static and dynamic variability caused by
process, temperature, voltage, and aging effects make nanometer circuits prone to timing …

Aging-aware critical path selection via graph attention networks

Y Ye, T Chen, Y Gao, H Yan, B Yu… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
In advanced technology nodes, aging effects like negative and positive bias temperature
instability (NBTI and PBTI) become increasingly significant, making timing closure and …