Exploring low cost optimal watermark for reusable IP cores during high level synthesis

A Sengupta, S Bhadauria - IEEE Access, 2016 - ieeexplore.ieee.org
The challenges in the current design process for consumer electronics products include
greater complexity and stiff time-to-market pressure, which has led to the usage of reusable …

A robust FSM watermarking scheme for IP protection of sequential circuit design

A Cui, CH Chang, S Tahar… - IEEE Transactions on …, 2011 - ieeexplore.ieee.org
Finite state machines (FSMs) are the backbone of sequential circuit design. In this paper, a
new FSM watermarking scheme is proposed by making the authorship information a non …

A case study in hardware Trojan design and implementation

A Baumgarten, M Steffen, M Clausman… - International Journal of …, 2011 - Springer
As integrated circuits (ICs) continue to have an overwhelming presence in our digital
information-dominated world, having trust in their manufacture and distribution mechanisms …

A cellular automata guided finite-state-machine watermarking strategy for IP protection of sequential circuits

R Karmakar, SS Jana… - IEEE transactions on …, 2020 - ieeexplore.ieee.org
Preventing the illegal use of Intellectual Property (IP) cores has been one of the most
fundamental challenges for the semiconductor industry. Hardware watermarking is a viable …

Designing trusted embedded systems from finite state machines

C Dunbar, G Qu - ACM Transactions on Embedded Computing Systems …, 2014 - dl.acm.org
Sequential components are crucial for a real-time embedded system as they control the
system based on the system's current state and real life input. In this article, we explore the …

DeepHardMark: Towards watermarking neural network hardware

J Clements, Y Lao - Proceedings of the AAAI Conference on Artificial …, 2022 - ojs.aaai.org
This paper presents a framework for embedding watermarks into DNN hardware
accelerators. Unlike previous works that have looked at protecting the algorithmic …

SoC: a real platform for IP reuse, IP infringement, and IP protection

D Saha, S Sur-Kolay - VLSI Design, 2011 - Wiley Online Library
Increased design complexity, shrinking design cycle, and low cost—this three‐dimensional
demand mandates advent of system‐on‐chip (SoC) methodology in semiconductor industry …

Finite state machine IP watermarking: A tutorial

AT Abdel-Hamid, S Tahar… - First NASA/ESA …, 2006 - ieeexplore.ieee.org
Sharing intellectual property (IP) blocks in today's competitive market poses significant high
security risks. In this paper, we present a tutorial for a watermarking approach based on the …

Ultra-low overhead dynamic watermarking on scan design for hard IP protection

A Cui, G Qu, Y Zhang - IEEE Transactions on Information …, 2015 - ieeexplore.ieee.org
Unlike conventional legal means, digital watermark enables an effective self-protection
mechanism for Very Large Scale Integration (VLSI) designers to protect their intellectual …

Decision model with quantification of buyer-supplier trust in advanced technology enterprises

ZA Collier, U Guin, J Sarkis, JH Lambert - … : An International Journal, 2022 - emerald.com
Purpose In the buyer-supplier relationship of a high-technology enterprise, the concepts of
trust and risk are closely intertwined. Entering into a buyer-supplier relationship inherently …