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Bus controller and control unit that outputs instruction to the bus controller
T Ishii, T Yamaguchi, A Yoshida - US Patent 9,075,747, 2015 - Google Patents
US9075747B2 - Bus controller and control unit that outputs instruction to the bus controller -
Google Patents US9075747B2 - Bus controller and control unit that outputs instruction to the …
Google Patents US9075747B2 - Bus controller and control unit that outputs instruction to the …
RF transceiver and transmission line behavioral modeling in VHDL-AMS for wired RFNoC
Despite the exceptional progress of MPSoC architectures, on chip communication networks
remain a lock for the evolution of their performances due to the power consumption and the …
remain a lock for the evolution of their performances due to the power consumption and the …
Generation of network-on-chip layout based on user specified topological constraints
In an aspect, the present disclosure provides a method that comprises automatic generation
of a NoC from specified topological information based on projecting NoC elements of the …
of a NoC from specified topological information based on projecting NoC elements of the …
Converter arm and associated converter device
It is presented a converter arm for power conversion. The converter arm comprises: a
plurality of converter cells, wherein each converter cell comprises a plurality of semi …
plurality of converter cells, wherein each converter cell comprises a plurality of semi …
Network-on-chip computing systems with wireless interconnects
Several embodiments of the present technology are related to network-on-chip based
integrated circuits with wireless interconnects. In one embodiment, a computing device …
integrated circuits with wireless interconnects. In one embodiment, a computing device …
Coarse-grained reconfigurable array based on a static router
Provided is a processor with a data transfer structure that is excellent in performance and
efficiency. According to an aspect, the processor may include a plurality of processing …
efficiency. According to an aspect, the processor may include a plurality of processing …
Network-on-chip based computing devices and systems
BACKGROUND High computing complexities and computation data demands have
contributed to an increase in parallel com puting capabilities. For example, individual …
contributed to an increase in parallel com puting capabilities. For example, individual …
Micro crossbar switch and on-die data network using the same
RP Masleid, T Suresh - US Patent 8,583,850, 2013 - Google Patents
An integrated circuit (IC) having an on-die data network is disclosed. The IC includes a first
bus and second buses con figured to convey signals in first and second directions …
bus and second buses con figured to convey signals in first and second directions …
Automatic generation of physically aware aggregation/distribution networks
Aspects of the present disclosure provide systems and methods for automatic generation of
physically aware aggre gation/distribution networks that enable optimized arrange ment of a …
physically aware aggre gation/distribution networks that enable optimized arrange ment of a …
Systems and methods for selecting a router to connect a bridge in the network on chip (NoC)
The present disclosure is directed to systems and methods for connecting hosts to any router
by the use of bridges. Example implementations described herein are directed to …
by the use of bridges. Example implementations described herein are directed to …