Design and performance analysis of gate-all-around negative capacitance do**less nanowire tunnel field effect transistor
In this paper, a novel low power consumption device based on a do**less gate-all-around
nanowire tunnel field effect transistor (TFET) with negative capacitance (NC) effect is …
nanowire tunnel field effect transistor (TFET) with negative capacitance (NC) effect is …
Design and Process Variation Analysis of High-performance n and p-channel Insulated-gate Asymmetric-DG MOSFET
Transistor miniaturization and reduction in power consumptions, are major driving factor for
designing the nanoscale transistor. But the impact of process variation on device …
designing the nanoscale transistor. But the impact of process variation on device …
TCAD simulation of sub-10 nm high-k SOI GaN FinFET by implementing fin optimization approach for high-performance applications
This paper reports, the enhanced electrical parameters of sub-10 nm High-k SOI GaN
FinFET by implementing fin optimization approach using TCAD simulation. The results show …
FinFET by implementing fin optimization approach using TCAD simulation. The results show …
Design and performance characterisation of 10 nm negative capacitance double gate MOSFET (NCDGMOSFET)
The major focus on any transistor-level design is to minimize the effects on switching speed
and power consumption at smaller dimensions, which are crucial in VLSI design for low …
and power consumption at smaller dimensions, which are crucial in VLSI design for low …
Impact of underlap layer on DC and RF/analog performance of asymmetric junctionless dual material double gate MOSFET for low-power analog amplifier design
Impact of underlap layer is analytically investigated on asymmetric junctionless dual material
double gate MOSFET (AJDMDG) to reduce subthreshold slope and threshold voltage, which …
double gate MOSFET (AJDMDG) to reduce subthreshold slope and threshold voltage, which …
Enhancing Drain Current Characteristic in Sub-10 nm Technology through p+ Pocket Negative Capacitance Double-Gate MOSFET
At transistor-level design minimizing dimensions and lower power consumption are the key
parameters that have emerged as intense research topics. This paper presents the design of …
parameters that have emerged as intense research topics. This paper presents the design of …
Design of FinFET as Biosensor
Research related to FET based biosensors has enormous potential to develop biomedical
devices for biosensing applications. These FET based biosensors are highly sensitive and …
devices for biosensing applications. These FET based biosensors are highly sensitive and …
A multimodal approach of information access and retrieval using neutrosophic sets
Information explosion in this era has led to the proliferation of digital data in form of image,
text, video and audio etc. This information exists in divergent modalities (image, text, audio …
text, video and audio etc. This information exists in divergent modalities (image, text, audio …
Dog breed classification using deep learning
A Yadav, G Chandra - Emerging Trends in IoT and Computing …, 2022 - taylorfrancis.com
Dog Breed classification is a particular application of Deep Neural Network. Convolutional
Neural Network is one of deep learning classification technique which demands a huge …
Neural Network is one of deep learning classification technique which demands a huge …
Effect of Semiconductor Materials on the Current Control Voltage Source Trancitor Hall Voltage.
Recently, it was stipulated in a publication that a missing elementary active-device termed"
trancitor" by its designer could be made and could greatly simplify electronic circuits. This …
trancitor" by its designer could be made and could greatly simplify electronic circuits. This …