A typical common source cascode low-noise amplifier (CS-LNA) can be treated as a CS-CG
two stage amplifier. In the published literature, an inductor is added at the drain of the main …

This paper presents the analysis and design of a novel topology of a low-noise amplifier
(LNA) with gain improvement and noise reduction simultaneously. A transformer feedback g …

This paper describes a linearization method to enhance the third-order distortion
performance of a subthreshold common-source cascode low-noise amplifier (LNA) without …

This paper presents the first single-chip 1.5 gigabit/s 60 GHz direct-conversion receiver. It
consumes only 37 mW DC power (less than 25 pJ/bit) for a die size of only 3 mm times 1 …

A 2.5 GHz differential CMOS LNA which fabricated with the 0.18 μm CMOS process is
proposed and the two-input and two-output architecture are designed. Complying with the …

An ultra low-voltage (0.65 V), 5 GHz low noise amplifier (LNA) has been designed, laid out
and simulated using Spectre simulator in a standard TSMC 0.18/spl mu/m CMOS …

This paper presents a linearity analysis to give insights into the impact of the cascode stage
in a common-source low-noise amplifier (LNA) that is designed with subthreshold biasing …

A very low-voltage design for two different low noise amplifier (LNA) topologies at 5 GHz has
been designed, laid out and simulated using Spectre simulator in a standard TSMC 0.18 …

This paper proposed a 2.5 GHz differential CMOS LNA which fabricated with the 0.18 μm
CMOS process. This design used two-input and two-output architecture. Complying with the …

Devices fabricated and modeled through TSMC 0.18 micron CMOS processes are used to
design radio frequency amplifiers. Two different mechanisms are applied to produce low …