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X-and K-band SiGe HBT LNAs with 1.2-and 2.2-dB mean noise figures
This paper presents low-noise amplifiers (LNA) at X-and K-band frequencies in a 0.18-μm
SiGe HBT technology. A method of noise match optimization with respect to base inductance …
SiGe HBT technology. A method of noise match optimization with respect to base inductance …
A 16-24 GHz CMOS SOI LNA with 2.2 dB mean noise figure
This paper presents a K-band low-noise amplifier (LNA) with a measured mean noise figure
of 2.2 dB at 16-24 GHz. The LNA is fabricated in 45 nm Semiconductor-on-Insulator (SOI) …
of 2.2 dB at 16-24 GHz. The LNA is fabricated in 45 nm Semiconductor-on-Insulator (SOI) …
65-nm CMOS dual-gate device for ka-band broadband low-noise amplifier and high-accuracy quadrature voltage-controlled oscillator
HY Chang, CH Lin, YC Liu, YL Yeh… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
Design and analysis of a two-stage low-noise amplifier (LNA) and a bottom-series coupled
quadrature voltage-controlled oscillator (QVCO) using a 65-nm CMOS dual-gate device are …
quadrature voltage-controlled oscillator (QVCO) using a 65-nm CMOS dual-gate device are …
Temperature Effect on -Band Current-Reused Common-Gate LNA in 0.13- CMOS Technology
WL Chen, SF Chang, KM Chen… - IEEE transactions on …, 2009 - ieeexplore.ieee.org
This paper presents the temperature effect on a Ku-band NMOS common-gate low-noise
amplifier (CG-LNA). The temperature characteristics of an NMOS transistor and spiral …
amplifier (CG-LNA). The temperature characteristics of an NMOS transistor and spiral …
A Ku-band interference-rejection CMOS low-noise amplifier using current-reused stacked common-gate topology
WL Chen, SF Chang, GW Huang… - IEEE microwave and …, 2007 - ieeexplore.ieee.org
A Ku-band CMOS low-noise amplifier (LNA) with high interference-rejection (IR), wide gain
control range, and low dc power consumption is presented. The LNA consists of two …
control range, and low dc power consumption is presented. The LNA consists of two …
Dual-input pseudo-switch RF low noise amplifier
D Zito, A Fonte - IEEE Transactions on Circuits and Systems II …, 2010 - ieeexplore.ieee.org
A dual-input low noise amplifier (DILNA) topology with pseudo-switch capability is
presented. This novel solution allows us to avoid the use of the RF switch in all cases in …
presented. This novel solution allows us to avoid the use of the RF switch in all cases in …
LNFET device with 325/475GHz and 0.47dB NFMIN at 20GHz for SATCOM applications in 45nm PDSOI CMOS
An experimental low noise FET (LNFET) device is presented in this paper with f_T/f_MAX of
325/475GHz. To authors' knowledge, this is the highest reported f_MAX for a CMOS device …
325/475GHz. To authors' knowledge, this is the highest reported f_MAX for a CMOS device …
A 1 V 23 GHz Low-Noise Amplifier in 45 nm Planar Bulk-CMOS Technology With High- Above-IC Inductors
WC Wang, ZD Huang, G Carchon… - IEEE microwave and …, 2009 - ieeexplore.ieee.org
A 23 GHz electrostatic discharge-protected low-noise amplifier (LNA) has been designed
and implemented by 45 nm planar bulk-CMOS technology with high-Q above-IC inductors …
and implemented by 45 nm planar bulk-CMOS technology with high-Q above-IC inductors …
[PDF][PDF] Design of Low Noise Amplifiers at 10 GHZ and 15 GHZ for Wireless Communication Systems
In this study, design and simulation of 15GHZ and 10GHZ Low Noise Amplifiers (LNA) have
been explored. The simulation has been performed by using the Agilent Advanced Design …
been explored. The simulation has been performed by using the Agilent Advanced Design …
A 400μW, 4.7–6.4 GHz VCO under an above-IC inductor in 45nm CMOS
J Borremans, G Carchon, P Wambacq… - 2008 58th Electronic …, 2008 - ieeexplore.ieee.org
A 4.7-to-6.4 GHz VCO is designed in 45 nm bulk CMOS using an above-IC inductor on top of
the active circuitry, yielding 28% area reduction. The inductor is shielded from the circuitry …
the active circuitry, yielding 28% area reduction. The inductor is shielded from the circuitry …