SRAMs capable of operating at extremely low supply voltages-for example, below the
transistor threshold voltage-can enable ultra-low-power battery-operated systems by …

Sense amplifier (SA) is being viewed as one of the most critical circuits in the periphery of
high-speed, low-power-embedded static random access memory (SRAMs). This paper …

With continued CMOS technology scaling down, transistors exhibit higher degrees of
variation and mismatch, resulting in a larger offset voltage. A large offset voltage will enlarge …

Bias Temperature Instability (BTI) is a major concern for the reliability of decameter to
nanometer devices. Older modeling approaches fail to capture time-dependent device …

Simulations of an inverter and a 32-bit SRAM bit slice are performed based on an atomistic
approach. The circuits' devices are populated with individual defects, which have realistic …

An ultra low energy, 128 kbit 6T SRAM in 90 nm LP CMOS with energy consumption of 4.4
pJ/access, operating at 80 MHz for the wireless sensor applications is developed. The …

In this paper, four types of on-chip point-to-point communication links are optimized for low
energy per bit at sufficient bandwidth density for use in high performance applications: on …

This paper presents the design of a high-speed ultra low power SRAM memory. Divided bit
lines improve dynamic cell stability while at the same time decreasing active energy …

As the value of Bitcoin increases, the difficulty level of mining keeps increasing. This is
generally addressed with application-specific integrated circuits (ASIC), but block …

Spin Wave Devices (SWDs) are promising candidates for scaling electronics beyond the
domain of CMOS. In contrast to traditional charge-based technologies, SWDs rely on …