AlGaN channel high electron mobility transistors (HEMTs) are the potential next step after
GaN channel HEMTs, as the high aluminum content channel leads to an ultra-wide …

In this paper, an analytical model of dual-metal hetero-dielectric (DM-HD) cylindrical gate all
around (GAA) MOSFET has been proposed to address and solve a substantial issue of gate …

The leakages in off state, particularly Gate Induced Drain Leakage (GIDL) has been
addressed and reduced by proposing a Shallow Extension Engineered Dual Material …

A low power zinc-oxide (ZnO) charge trap** memory with embedded silicon (Si)
nanoparticles is demonstrated. The charge trap** layer is formed by spin coating 2 nm …

We show a reduction in the interface trap density (D it) at the amorphous-silicon/crystalline-
silicon interface by annealing in nitrogen (95%) and hydrogen (5%) for 10, 20 and 25 min at …

In this paper, the impact of different Ge preamorphization implantation (PAI) conditions on
the formation of ultrathin TiSi x as well as on the specific contact resistivity (Pc) in TiSi x/n-Si …

This work investigates Silicon-on-Insulator (SOI) pMOS leakage current. Temperature
measurements indicates the superposition of two leakage mechanisms: band-to-band …

Through detailed experimental and modeling activities, this paper investigates the origin of
the temperature dependence of the Erase operation in 3D nand flash arrays. First of all …

This research article presents a simulation study on a dielectric pocket engineered dual
metal nanowire ferroelectric (DPE-DM-NW-Fe FET) MOSFET. The aim is to mitigate the Gate …

In this paper, retention characteristics of the trap-assisted tunneling (TAT) mechanism are
investigated in sub 20-nm NAND flash memory. Total charge loss source for the TAT …