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A survey of bit-flip attacks on deep neural network and corresponding defense methods
As the machine learning-related technology has made great progress in recent years, deep
neural networks are widely used in many scenarios, including security-critical ones, which …
neural networks are widely used in many scenarios, including security-critical ones, which …
The gem5 simulator: Version 20.0+
The open-source and community-supported gem5 simulator is one of the most popular tools
for computer architecture research. This simulation infrastructure allows researchers to …
for computer architecture research. This simulation infrastructure allows researchers to …
Archgym: An open-source gymnasium for machine learning assisted architecture design
Machine learning (ML) has become a prevalent approach to tame the complexity of design
space exploration for domain-specific architectures. While appealing, using ML for design …
space exploration for domain-specific architectures. While appealing, using ML for design …
Distilling bit-level sparsity parallelism for general purpose deep learning acceleration
Along with the rapid evolution of deep neural networks, the ever-increasing complexity
imposes formidable computation intensity to the hardware accelerator. In this paper, we …
imposes formidable computation intensity to the hardware accelerator. In this paper, we …
System simulation with gem5 and SystemC: The keystone for full interoperability
SystemC TLM based virtual prototypes have become the main tool in industry and research
for concurrent hardware and software development, as well as hardware design space …
for concurrent hardware and software development, as well as hardware design space …
DRAMSys4. 0: a fast and cycle-accurate systemC/TLM-based DRAM simulator
Abstract The simulation of DRAMs (Dynamic Random Access Memories) on system level
requires highly accurate models due to their complex timing and power behavior. However …
requires highly accurate models due to their complex timing and power behavior. However …
Sparse stream semantic registers: A lightweight ISA extension accelerating general sparse linear algebra
Sparse linear algebra is crucial in many application domains, but challenging to handle
efficiently in both software and hardware, with one-and two-sided operand sparsity handled …
efficiently in both software and hardware, with one-and two-sided operand sparsity handled …
RTSim: A cycle-accurate simulator for racetrack memories
Racetrack memories (RTMs) have drawn considerable attention from computer architects of
late. Owing to the ultra-high capacity and comparable access latency to SRAM, RTMs are …
late. Owing to the ultra-high capacity and comparable access latency to SRAM, RTMs are …
Approximate computing with partially unreliable dynamic random access memory-approximate DRAM
In the context of approximate computing, Approximate Dynamic Random Access Memory
(ADRAM) enables the tradeoff between energy efficiency, performance and reliability. The …
(ADRAM) enables the tradeoff between energy efficiency, performance and reliability. The …
Omitting refresh: A case study for commodity and wide i/o drams
Dynamic Random Access Memories (DRAM) have a big impact on performance and
contribute significantly to the total power consumption in systems ranging from mobile …
contribute significantly to the total power consumption in systems ranging from mobile …